Product Subtitle / Keywords:
2.89 Inch Display, 1440(RGB)×1440 Resolution, Transmissive a-Si TFT-LCD, MIPI Interface, COG+FPC+B/L, 16.7M Colors, 39-Pin, 2.9V LED Voltage, 95mA LED Current, 13 LEDs, -20°C~70°C Operating Temperature
1. Executive Summary & Product Positioning
The LS029I01-MP-V1, developed by Lixin (Wan'an) Intelligent Display Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 2.89-inch transmissive amorphous Silicon TFT-LCD (a-Si TFT-LCD) module.
This product specification (Revision 1.0, Module Type: COG+FPC+B/L) serves as the definitive technical document, defining its structural composition (COG+FPC+B/L), physical features, mechanical dimensions, detailed electrical characteristics, complete MIPI interface pinout and timing, and comprehensive electro-optical performance. It delivers a resolution of 1440(RGB)×1440 with 16.7M-color display capability.
The document provides the core parameters necessary for system integration into compact, high-resolution embedded display applications. The unequivocal recommendation for engineers is to strictly adhere to the electrical specifications, interface timing, and mechanical tolerances described herein to ensure reliable performance and compatibility.
2. Detailed Product Overview & Architecture
- Core Technology: Transmissive-type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display).
- Display Mode: Active matrix TFT, Transmissive type.
- Display Format: Graphic 1440(RGB)×1440 Dot-matrix.
- Display Characteristics: Capable of displaying up to 16.7 million colors.
- Module Construction: COG (Chip-On-Glass) + FPC (Flexible Printed Circuit) + B/L (Backlight Unit). Composed of a TFT-LCD panel, a driver circuit, and a backlight unit.
- Input Data: MIPI.
- Connector Pin Count: 39-Pin.
- Approval Status: ☑ Approved Product Specification only (as per signature block).
3. Exhaustive Technical Specifications
3.1 Mechanical & Physical Specifications
(Not explicitly provided in the extracted document excerpt; refer to Section 2 of the full specification.)
| Item | Specification | Unit |
|---|---|---|
| Panel Size (Diagonal) | 2.89 | inch |
| Number of dots / Resolution | 1440(RGB) × 1440 | pixel |
| Display Colors | 16.7M | colors |
3.2 Electrical & Interface Specifications
3.2.1 Electrical Characteristics (DC – Recommended Operating Conditions)
Conditions: Ta=+25°C, GND=0V.
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Remarks |
|---|---|---|---|---|---|---|
| Driver IC (Digital) Power Supply Voltage | VDDI | 1.70 | 1.80 | 1.9 | V | Note7-1 |
| Driver IC (Positive Analog) Power Supply Voltage | AVDD | 5.3 | 5.5 | 6.0 | V | Note7-1 |
| Driver IC (Negative Analog) Power Supply Voltage | AVEE | -6.0 | -5.5 | -5.3 | V | Note7-1 |
| Input voltage (Low) | VIL | 0 | - | 0.3 VDDI | V | Note7-2 |
| Input voltage (High) | VIH | 0.7 VDDI | - | VDDI | V | Note7-2 |
| Input current (Low) | IIL | -10 | - | - | μA | |
| Input current (High) | IIH | - | - | 10 | μA | |
| Output voltage (Low) | VOL | 0 | - | 0.2 VDDI | V | LOL=+0.1mA |
| Output voltage (High) | VOH | 0.8 VDDI | - | VDDI | V | IOH=-0.1mA |
| Current consumption Video mode without RAM 2port (SDC) | IVDDIO | - | - | 48(*1) | mA | Note7-3 |
| Current consumption Video mode without RAM 2port (SDC) | IVSP | - | - | 14(*1) | mA | Note7-3 |
| Current consumption Video mode without RAM 2port (SDC) | IVSN | -40(*2) | -14(*1) | - | mA | Note7-3 |
Notes (from document):
- Note7-1: Include Ripple Noise.
- Note7-2: Applied overshoot.
- Note7-3: 120Hz / (*1) Gradation shift pattern, (*2) 1dot checker pattern, (*3) Random dot pattern.
3.2.2 Backlight Unit Characteristics
Conditions: Ta=+25°C, GND=0V.
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Remarks |
|---|---|---|---|---|---|---|
| LED Voltage | $V_{LED}$ | - | 2.9 | 3.2 | V | per unit |
| LED Current | $I_{LED}$ | - | 95 | 100 | mA | Duty 10% |
| Power Consumption | $W_{LED}$ | - | 3582 | - | mW | When LED on, Duty 11% |
| LED Quantity | LED Quantity | 13 | 13 | 13 | pcs |
3.2.3 Pin Description (39-pin FPC)
| Pin No | Symbol | I/O | Description | Remarks |
|---|---|---|---|---|
| 1 | DSIA_D3_N | I | MIPI data3 negative signal of MIPI Port A | |
| 2 | DSIA_D3_P | I | MIPI data3 positive signal of MIPI Port A | |
| 3 | DSIA_D0_N | I/O | MIPI data0 negative signal of MIPI Port A | |
| 4 | DSIA_D0_P | I/O | MIPI data0 positive signal of MIPI Port A | |
| 5 | DSIA_CLK_N | I | MIPI clock negative signal of MIPI Port A | |
| 6 | DSIA_CLK_P | I | MIPI clock positive signal of MIPI Port A | |
| 7 | DSIA_D1_N | I | MIPI data1 negative signal of MIPI Port A | |
| 8 | DSIA_D1_P | I | MIPI data1 positive signal of MIPI Port A | |
| 9 | DSIA_D2_N | I | MIPI data2 negative signal of MIPI Port A | |
| 10 | DSIA_D2_P | I | MIPI data2 positive signal of MIPI Port A | |
| 11 | DSIB_D2_P | I | MIPI data2 positive signal of MIPI Port B | |
| 12 | DSIB_D2_N | I | MIPI data2 negative signal of MIPI Port B | |
| 13 | DSIB_D1_P | I | MIPI data1 positive signal of MIPI Port B | |
| 14 | DSIB_D1_N | I | MIPI data1 negative signal of MIPI Port B | |
| 15 | DSIB_CLK_P | I | MIPI clock positive signal of MIPI Port B | |
| 16 | DSIB_CLK_N | I | MIPI clock negative signal of MIPI Port B | |
| 17 | DSIB_D0_P | I/O | MIPI data0 positive signal of MIPI Port B | |
| 18 | DSIB_D0_N | I/O | MIPI data0 negative signal of MIPI Port B | |
| 19 | DSIB_D3_P | I | MIPI data3 positive signal of MIPI Port B | |
| 20 | DSIB_D3_N | I | MIPI data3 negative signal of MIPI Port B | |
| 21 | EN1PORT | I | EN1PORT is used for enable or disable MIPI dual port | "H" single port |
| 22 | AVDD | - | Power supply for analog | |
| 23 | VDDI | - | Power supply for I/O | |
| 24 | VDDI | - | Power supply for I/O | |
| 25 | EXCK | I | External Clock (not used) | GND |
| 26 | GND | - | Ground | |
| 27 | GND | - | Ground | |
| 28 | GND | - | Ground | |
| 29 | RESX | I | Device reset signal | "L" Active |
| 30 | FTE | O | Frame head pulse signal (not used) | Open |
| 31 | Sync | O | Synchronizing signal (not used) | Open |
| 32 | LEDPWM | O | Backlight LED driver PWM (if not used, "floating") | |
| 33 | AGND | - | Ground | |
| 34 | AGND | - | Ground | |
| 35 | AGND | - | Ground | |
| 36 | AVEE | - | Power supply for analog | |
| 37 | LED_CA1 | LED back light power negative1(6LED) | ||
| 38 | LED_CA2 | LED back light power negative2(7LED) | ||
| 39 | LED_AN2 | LED back light power positive2(7LED) |
Fitting connector: JAE WP7B-S040VA1 (Board-to-Board Receptacle)
Interface Summary:
- MIPI Dual Port: The module uses two MIPI ports (Port A and Port B), each with 4 data lanes and 1 clock lane, for high-speed serial data transmission.
- EN1PORT (Pin 21): This pin is used to enable or disable the MIPI dual port mode. When set to "H", the module operates in single port mode.
- Power: VDDI (Pins 23, 24) for digital I/O, AVDD (Pin 22) for positive analog, AVEE (Pin 36) for negative analog, GND (Pins 26-28) for digital ground, AGND (Pins 33-35) for analog ground.
- Control: RESX (Pin 29) for device reset (active low), LEDPWM (Pin 32) for backlight PWM control.
- Backlight: LED_CA1 (Pin 37) for 6 LEDs cathode, LED_CA2 (Pin 38) for 7 LEDs cathode, LED_AN2 (Pin 39) for 7 LEDs anode.
- Unused Pins: EXCK (Pin 25) should be connected to GND, FTE (Pin 30) and Sync (Pin 31) should be left open.
3.2.4 MIPI DSI LP-RX/TX Clock and Data-Clock Specifications
| Item | Symbol | Unit | Test condition | Min | Typ | Max | Notes |
|---|---|---|---|---|---|---|---|
| Length of Low-Power TX period in case of using DSI clock | $T_{LPTX1}$ | UI | IOVCC=DPHYVCC=1.65 ~ 1.95V | - | 32 | - | 4 |
| Length of Low-Power TX period in case of using internal OSC clock | $T_{LPTX2}$ | ns | IOVCC=DPHYVCC=1.65 ~ 1.95V | - | 1/(fosc/4) | - | 4 |
DC Characteristics (MIPI):
| Item | Item | Symbol | Unit | Test condition | Min. | Typ. | Max. | Note |
|---|---|---|---|---|---|---|---|---|
| CD-RX | Logic 1 contention threshold | VIHCD | mV | IOVCC=1.65V~1.95V DPHYVCC=1.65V~1.95V | 450 | - | - |
Notes (from document):
4. When fDSICLK<123MHz, change auto load NV setting so that it is compliant with THS-PREPARE+THS-ZERO spec.
5. Minimum tSETUP/tHOLD Time is 0.15UI. This value may change according to DSI transfer rate.
6. tSETUP/tHOLD Time is measured without HS-TX Jitter.
3.2.5 Recommended Power Off Sequence
| Step | Address | Parameter | Data | DSI data type | DSI data type | Delay | Command | |
|---|---|---|---|---|---|---|---|---|
| 1 | 28h | - | - | DCS | 39h | Display Off | g | |
| 2 | Wait | Wait | Wait | Wait | Wait | Min.1 frame | g | |
| 3 | 10h | - | - | DCS | 39h | Sleep In | h | |
| 4 | Wait | Wait | Wait | Wait | Wait | Min.4 frame | Hsync/Vsync signals should be send after Sleep In command | h |
| 5 | Mipi data transfer Stop | |||||||
| 6 | AVEE-(Typ -5.5V) OFF | AVEE-(Typ -5.5V) OFF | AVEE-(Typ -5.5V) OFF | AVEE-(Typ -5.5V) OFF | AVEE-(Typ -5.5V) OFF | k | ||
| 7 | tPOFF1/tPOFF2 | Wait | k | |||||
| 8 | AVDD+(Typ +5.5V) OFF | AVDD+(Typ +5.5V) OFF | AVDD+(Typ +5.5V) OFF | AVDD+(Typ +5.5V) OFF | AVDD+(Typ +5.5V) OFF | m | ||
| 9 | thAVP | Wait | m | |||||
| 10 | RESX Low | RESX Low | RESX Low | RESX Low | RESX Low | XRES = L | m | |
| 11 | Wait | Wait | Wait | Wait | Wait | Min.0ms | m | |
| 12 | VDDI OFF (Typ.1.8V) OFF | VDDI OFF (Typ.1.8V) OFF | VDDI OFF (Typ.1.8V) OFF | VDDI OFF (Typ.1.8V) OFF | VDDI OFF (Typ.1.8V) OFF |
3.3 Optical & Electro-Optical Characteristics
(Not explicitly provided in the extracted document excerpt; refer to Section 8 of the full specification.)
3.4 Version Record
(Not explicitly provided in the extracted document excerpt; refer to Section 11 of the full specification.)
4. Application Guidelines & Critical Notes
Intended Use
- High-resolution portable displays
- VR/AR headsets and near-eye displays
- Industrial handheld devices
- Medical instruments
- Any application requiring a compact, high-resolution display with excellent image quality
Critical Design Considerations
-
MIPI Dual Port Interface:
- This module uses a MIPI-DSI interface with dual ports (Port A and Port B).
- Each port has 4 data lanes and 1 clock lane, for a total of 8 data lanes and 2 clock lanes.
- The host MCU must have a MIPI-DSI controller that supports dual port mode with 8 data lanes.
- The EN1PORT (Pin 21) pin is used to enable or disable the dual port mode. When set to "H", the module operates in single port mode.
-
Power Supply:
- Provide stable VDDI (1.70V to 1.9V, 1.80V typical) for the digital I/O (connected to Pins 23, 24).
- Provide stable AVDD (5.3V to 6.0V, 5.5V typical) for the positive analog supply (connected to Pin 22).
- Provide stable AVEE (-6.0V to -5.3V, -5.5V typical) for the negative analog supply (connected to Pin 36).
- The backlight requires a constant-current LED driver connected to LED_CA1 (Pin 37), LED_CA2 (Pin 38), and LED_AN2 (Pin 39), set to 95 mA (Typ) at approximately 2.9V (Typ) per unit. The backlight consists of 13 LEDs (6 in one group, 7 in another).
-
Power Off Sequence:
- The document provides a detailed Recommended Power Off Sequence that must be followed to ensure reliable operation and prevent damage.
- The sequence involves: Display Off → Sleep In → Wait → MIPI data transfer Stop → AVEE OFF → Wait → AVDD OFF → Wait → RESX Low → Wait → VDDI OFF.
-
Mechanical Integration:
- Module Outline: The module uses a 39-pin FPC.
- Fitting Connector: JAE WP7B-S040VA1 (Board-to-Board Receptacle).
-
Optical Performance:
- Resolution: 1440×1440 (Square) – high pixel density for sharp text and graphics.
- Display Colors: Up to 16.7M colors (24-bit true color).
-
Temperature Limits:
- Operating Temperature: -20°C to +70°C (from the Power Off Sequence context).
- Storage Temperature: -30°C to +80°C (from the Power Off Sequence context).
Handling & Compliance
- Observe standard ESD precautions during handling and assembly.
- The module contains fragile glass and a 39-pin FPC – handle with care.
- Avoid bending the FPC sharply, especially near the connector interface.
- The module uses a Board-to-Board connector (JAE WP7B-S040VA1) – ensure proper mating and alignment.
5. Conclusion & Design-In Support
The LS029I01-MP-V1 specification details a high-resolution 2.89-inch display module with a MIPI dual port interface — an excellent choice for applications requiring a compact, high-resolution display with excellent image quality.
Key Strengths:
-
High Resolution (Square): The 1440×1440 resolution in a 2.89-inch format provides excellent pixel density (over 700 PPI) for sharp text and graphics.
-
MIPI Dual Port Interface: The dual port MIPI-DSI interface with 8 data lanes provides high bandwidth for high-resolution content.
-
High Color Depth: 16.7M colors (24-bit true color) provides excellent color reproduction.
-
Detailed Power Sequence: The specification provides a detailed power off sequence to ensure reliable operation.
-
Standard Connector: The module uses a JAE WP7B-S040VA1 board-to-board connector for a robust connection.
Main Design Focus:
- The critical design task is properly implementing the MIPI dual port interface with the correct timing and lane configuration.
- Supporting requirements:
- Provide stable VDDI (1.8V typical), AVDD (5.5V typical), and AVEE (-5.5V typical) power.
- Provide a constant-current backlight driver set to 95 mA at 2.9V (Typ) for the 13-LED backlight.
- Mechanical integration — verify the 39-pin FPC and JAE WP7B-S040VA1 connector.
- Power sequence — follow the recommended power off sequence to ensure reliable operation.
This module is an excellent choice for high-end portable devices, VR/AR headsets, and any application requiring a compact, high-resolution square display with a high-speed MIPI interface.
