Product Subtitle / Keywords:
1.6 Inch Display, 400(RGB)×400 Resolution, Transmissive a-Si TFT IPS, QSPI Interface, COG+FPC+B/L, 16M Colors, ST77903 Driver, 42.14×44.23×1.96 mm, 400 cd/m² Brightness, -20°C~70°C Operating Temperature, Free (IPS) Viewing Direction

1. Executive Summary & Product Positioning

The LS016I02-QS-V1, developed by Lixin (Wan'an) Intelligent Display Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 1.6-inch transmissive amorphous Silicon TFT-LCD (a-Si TFT-LCD) module with IPS (In-Plane Switching) technology.

This product specification (Revision 1.0, Module Type: COG+FPC+B/L) serves as the definitive technical document, defining its structural composition (COG+FPC+B/L), physical features, mechanical dimensions, absolute maximum ratings, detailed electrical characteristics, complete QSPI (Quad Serial Peripheral Interface) pinout and timing, and comprehensive electro-optical performance. It delivers a high-resolution square display of 400(RGB)×400 with 16M-color display capability, driven by the ST77903 controller.

The document provides the core parameters necessary for system integration into high-performance embedded display applications. The unequivocal recommendation for engineers is to strictly adhere to the electrical specifications, interface timing, and mechanical tolerances described herein to ensure reliable performance and compatibility.

2. Detailed Product Overview & Architecture

• Core Technology: Transmissive-type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display).
• Display Mode: Active matrix TFT, Transmissive type.
• Display Format: Graphic 400(RGB)×400 Dot-matrix.
• Display Characteristics: Capable of displaying up to 16M colors.
• Module Construction: COG (Chip-On-Glass) + FPC (Flexible Printed Circuit) + B/L (Backlight Unit). Composed of a TFT-LCD panel, a driver circuit, and a backlight unit.
• Input Data: QSPI (Quad Serial Peripheral Interface).
• Viewing Direction (Grayscale Inversion): Free (IPS) – wide viewing angle in all directions.
• Drive IC: ST77903.
• Approval Status: ☑ Approved Product Specification only (as per signature block).

3. Exhaustive Technical Specifications

3.1 Mechanical & Physical Specifications

Critical Mechanical Design Notes (from outline dimension drawing):

1. Display Mode: 16.7M Color TFT, Transmissive, Normally Black Mode.
2. Module Luminance: 400 cd/m².
3. Drive IC: ST77903.
4. Viewing Direction: ALL (IPS).
5. Operating Temperature: -20°C ~ +70°C.
6. Storage Temperature: -30°C ~ +80°C.
7. General Tolerance: ±0.20 mm.
8. Angular Tolerance: ∠ ±1/4°.
9. ROHS Compliance: All materials must comply with RoHS and Halogen-Free standards.
10. Backlight Drive Condition: IF = 60mA, Vf = 2.8 ~ 3.3V (TYP).
11. Steel Plate Reinforcement + FPC Total Thickness: 0.30 mm.
12. Steel Plate Reinforcement: 0.2 mm.
13. TP Interface: The module includes a TP (Touch Panel) interface with the following pin definition: TP_GND, TP_VDD, TP_INT, TP_RST, TP_SDA, TP_SCL.
14. PD Interface Definition: The module includes a PD (likely Power/Display) interface with pins: VCI, IOVCC, ID/NC, RESET, DA2, DA3, SCL, DA, CS, TP_GND, TP_VDD, TP_INT, TP_RST, TP_SDA, TP_SCL, GND, LEDA, LEDK, TE, GND.
15. Yellow Insulation Paper: Included for handling during assembly.
16. Silver Paste Points: Present on the module.
17. Connector: OK-14GM024-04 (Yaqi male connector).
18. FPC Bend: The FPC has a designated bend area (易撕贴手撕位).
19. Component Area: Designated component area on the FPC.
20. LCD AA: 39.84 mm.
21. LCD & CF: 41.74 mm.
22. BL: 42.14 mm.
23. POL: 41.24 mm.

3.2 Electrical & Interface Specifications

3.2.1 Absolute Maximum Ratings

Notes (interpreted):

• Note1/Note2: Stress beyond these ratings may cause permanent damage; functional operation is not implied under these conditions.

3.2.2 Electrical Characteristics (DC – Recommended Operating Conditions)

3.2.3 Pin Description (24-pin FPC)

Interface Summary:

• QSPI Interface: Pins 2, 3, 5, 6 (DA0, DA1, DA2, DA3) form a Quad SPI (QSPI) bus — a high-speed 4-bit serial interface allowing data transfer 4x faster than standard SPI.
• Control Pins: CS (Chip Select, Pin 1), SCL (Serial Clock, Pin 4), RESET (Pin 9).
• Power Pins: VCI (Pin 15) for main logic, IOVCC (Pin 14) for I/O interface, GND (Pins 12, 18) for ground.
• Backlight: Dedicated LEDA (Anode, Pin 17) and LEDK (Cathode, Pin 16) pins.
• TE Pin (Pin 13): Tearing effect output — can be used for frame synchronization.
• Touch Panel Interface: Pins 19-24 provide a dedicated interface for an external touch panel (TP_SCL, TP_SDA, TP_RST, TP_INT, TP_VDD, TP_GND).
• Unused Pins: Pins 7, 8, 10, 11 are NC — leave floating.

3.2.4 QSPI Interface Timing Characteristics

Conditions: VDDI=1.65 to 3.3V, VDD=2.4 to 3.3V, AGND=DGND=0V, Ta=25°C.

Note: The rising time and falling time (Tr, Tf) of input signal are specified at 15 ns or less. Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.

A. Write Operation Timing:

B. Read Operation Timing:

Important Note: All QSPI timing parameters in this document revision are marked as "TBD" (To Be Determined). This indicates these values are pending final characterization by the manufacturer. Engineers should contact Lixin (Wan'an) Intelligent Display Technology Co., Ltd. directly for confirmed timing values before finalizing their design.

QSPI Timing Diagram Notes (from document):

The timing diagram (Figure 7-3) shows the following signal relationships for QSPI operation:

• CSX: Chip select signal.
• SCL: Serial clock signal.
• DA[3:0]: Four data lines (DA0, DA1, DA2, DA3).
• The diagram illustrates the setup and hold times for CSX, SCL, and DA[3:0] signals during both write and read operations.

Note 1 (from document): At display data (CMD 0x006000). When CSX go to "H", must be wait over 500ns than CSX should be returned "L" level.

Minimum Line Time Condition (from document):

• Minimum line time must be > 40us.
• Vsync width and Vsync porch > 40us.
• For example: In 60Hz, 320RGBx400 resolution: Vsync width=1, Vsync front+back porch=12. Line time = 16.67/(400+1+12) = 40.363us. This line time fits the minimum line time condition.

3.2.5 Color Format (QSPI)

The document specifies three color formats for QSPI data transmission:

A. QSPI RGB888 (24-bit):

• Data is transmitted as 24-bit RGB values (R[7:0], G[7:0], B[7:0]).
• The timing diagram shows the data sequence: Instruction → 1st AD[23:0] → pixel data.

B. QSPI RGB666 (18-bit):

• Data is transmitted as 18-bit RGB values (R[5:0], G[5:0], B[5:0]).
• The timing diagram shows the data sequence: Instruction → 1st AD[23:0] → pixel data.

C. QSPI RGB565 (16-bit):

• Data is transmitted as 16-bit RGB values (R[4:0], G[5:0], B[4:0]).
• The timing diagram shows the data sequence: Instruction → 1st AD[23:0] → pixel data.

3.2.6 Reset Timing

Reset Timing Notes (from document):

1. The reset cancel includes also required time for loading ID bytes, VCOM setting and other settings from NVM (or similar device) to registers. This loading is done every time when there is HW reset cancel time (tRT) within 5 ms after a rising edge of RESX.

2. Spike Rejection: Spike due to an electrostatic discharge on RESX line does not cause irregular system reset according to the table below:

3. During the Resetting period, the display will be blanked (The display is entering blanking sequence, which maximum time is 120 ms, when Reset Starts in Sleep Out mode. The display remains the blank state remains in Sleep In-mode.) and then return to Default condition for Hardware Reset.

4. Spike Rejection also applies during a valid reset pulse: Less than 20ns width positive spike will be rejected.

5. When Reset applied during Sleep In Mode.

6. When Reset applied during Sleep Out Mode.

7. It is necessary to wait 5msec after releasing RESX before sending commands. Also Sleep Out command cannot be sent for 120msec.

3.2.7 Backlight Unit

Backlight Circuit Diagram (from document):

LEDA → [Backlight Circuit] → LEDK
IF = 60mA
VF = 2.8V ~ 3.3V

3.3 Optical & Electro-Optical Characteristics

(Not explicitly provided in the extracted document excerpt; refer to Section 8 of the full specification.)

3.4 Inspection Standards

3.4.1 AQL (Acceptable Quality Level)

According to GB/T 2828-2003; normal inspection, Class II.

3.4.2 Basic Conditions for Inspection

The LCM face to us, in normal environment, about an angle of incidence 30°, a distance of 30cm with normal eye, with an angle of 45° to check the products without uncovering the film.

3.4.3 Inspection Item and Criteria

3.4.3.1 Visual Inspection Criterion in Immobility

A. Glass Defect:

B. FPC Defect:

C. Black Tape & Mara Tape:

D. Silicon and Tuffy Glue:

3.4.3.2 Electrical Criteria

E. Fiber, Glass Scratch, Polarizer Scratch/Folded (minor defect):

3.5 Version Record

4. Application Guidelines & Critical Notes

Intended Use

• Smartwatches, fitness trackers, and other wearable devices
• IoT display nodes and smart home controls
• Miniature handheld instruments
• Any application requiring a compact, high-resolution square display with IPS viewing angles

Critical Design Considerations

1. QSPI Interface – High-Speed Design:

   • This module uses a QSPI (Quad SPI) interface with 4 data lines (DA0, DA1, DA2, DA3) for simultaneous data transfer, providing 4x the throughput of standard SPI.
   • The host MCU must have a QSPI peripheral or be able to emulate QSPI with sufficient speed.
   • PCB Layout: Keep the 4 QSPI data lines (DA0-DA3) and clock (SCL) as short as possible and equal in length to minimize skew.
   • Use a series resistor (10-22Ω) on each QSPI line near the host MCU to reduce signal reflections.
   • A separate CS (Chip Select) line is used for chip selection.

2. Power Supply:

   • Provide stable VCI (2.6V to 3.3V, 2.8V typical) for the main logic and analog circuits (connected to Pin 15).
   • Provide stable IOVCC (1.65V to 3.3V, 1.8V typical) for the I/O interface (connected to Pin 14).
   • The backlight requires a constant-current LED driver connected to LEDA (Anode, Pin 17) and LEDK (Cathode, Pin 16), set to 60 mA at approximately 2.8~3.3V.

3. Touch Panel Interface:

   • The module includes a dedicated TP interface (Pins 19-24) for an external capacitive touch panel.
   • The TP interface uses: TP_SCL (I²C clock), TP_SDA (I²C data), TP_RST (Reset), TP_INT (Interrupt), TP_VDD (Power), and TP_GND (Ground).
   • Ensure the touch panel controller is properly initialized via its I²C interface.

4. TE (Tearing Effect) Pin (Pin 13):

   • The TE pin outputs the display's tearing effect signal.
   • This signal can be used to synchronize MCU frame writes with the display's internal refresh cycle, preventing screen tearing.
   • If not used, leave this pin open.

5. Reset Circuit:

   • The RESET pin (Pin 9) is active low.
   • It must be driven low for at least 10 μs during power-up for proper initialization.
   • A pulse shorter than 5 μs will be rejected.
   • After releasing RESET, wait 5 ms before sending any commands. Sleep Out command (0x11) cannot be sent for 120 ms.
   • A simple RC circuit (10kΩ resistor to VCC, 1μF capacitor to GND) or an MCU GPIO is recommended.

6. Color Format Selection:

   • The QSPI interface supports RGB888 (24-bit), RGB666 (18-bit), and RGB565 (16-bit) color formats.
   • Select the appropriate format based on your system's color depth requirements and bandwidth limitations.

7. Minimum Line Time:

   • The minimum line time must be > 40 μs.
   • Vsync width and Vsync porch must be > 40 μs.
   • For a 60Hz refresh rate with 400 lines: Line time = 16.67ms / (400 + 1 + 12) = 40.363 μs, which meets the minimum requirement.

8. CSX High Pulse Width:

   • When CSX goes to "H", must wait over 500ns before CSX should be returned to "L" level (at display data CMD 0x006000).

9. Mechanical Integration:

   • Module Outline: 42.14mm (H) × 44.23mm (V) × 1.96mm (D).
   • Active Area: 39.84mm × 39.84mm – a perfectly square display.
   • FPC: The module uses a 24-pin FPC with 0.5mm pitch (from the drawing notation: Pitch 0.5*9=4.50±0.05). Ensure the connector is properly selected.
   • FPC Bend: The FPC has a designated bend area — follow the intended bend direction for installation.
   • Steel Plate Reinforcement: The FPC includes a 0.2mm steel plate reinforcement for structural integrity.
   • Backlight Protrusion: The backlight wiring area may protrude — provide mechanical clearance in the housing.

10. Temperature Limits:

    • Operating Temperature: -20°C to +70°C.
    • Storage Temperature: -30°C to +80°C.

11. Quality Standards:

    • The module is inspected according to **GB/T 2828-2003 with AQL of 0.65 for major defects and 1.5 for minor defects.
    • Comprehensive inspection criteria are provided for glass defects, FPC defects, tape defects, and electrical defects.

Handling & Compliance

• The module is ROHS compliant and Halogen-Free.
• Observe standard ESD precautions during handling and assembly.
• The module contains fragile glass and a 24-pin FPC – handle with care.
• Avoid bending the FPC sharply, especially near the connector interface.
• The module includes a yellow insulation paper for handling during assembly.
• The module has silver paste points — avoid contact with these areas.
• The module includes a tear-off sticker (易撕贴) for handling during assembly.

5. Conclusion & Design-In Support

The LS016I02-QS-V1 specification details a high-performance 1.6-inch square IPS display module with a high-speed QSPI interface — an excellent choice for wearable and compact display applications requiring high resolution and fast data transfer.

Key Strengths:

1. High-Resolution Square Display: The 400×400 resolution in a 1.6-inch square format is ideal for round or circular watch faces (with a circular mask) or symmetrical UI designs.

2. IPS Technology: Free (IPS) viewing direction ensures consistent image quality from any perspective — essential for wearable devices.

3. High-Speed QSPI Interface: The 4-bit parallel data transfer provides excellent throughput for smooth animations and fast screen updates.

4. High Color Depth: 16M colors (24-bit true color) provides excellent color reproduction.

5. Integrated Touch Panel Interface: The dedicated TP interface (Pins 19-24) simplifies integration with external capacitive touch panels.

6. TE (Tearing Effect) Support: The dedicated TE pin enables tear-free graphics synchronization.

7. Comprehensive Inspection Standards: Detailed AQL-based inspection criteria ensure consistent quality.

8. Wide Operating Temperature Range: -20°C to +70°C for operation and -30°C to +80°C for storage.

9. ROHS and Halogen-Free Compliance: Meets environmental standards.

Main Design Focus:

• The critical design task is properly implementing the high-speed QSPI interface with careful PCB layout (length-matched data lines, series termination resistors).
• Supporting requirements:
  • Provide stable VCI (2.8V typical) and IOVCC (1.8V typical) power.
  • Provide a constant-current backlight driver set to 60 mA at 2.8~3.3V.
  • Mechanical integration — the module outline is 42.14mm × 44.23mm × 1.96mm.
  • FPC connector — verify the 24-pin FPC with 0.5mm pitch.
  • Touch panel integration — connect and initialize the external touch panel via the dedicated TP interface.
  • Reset timing — ensure proper reset pulse width (≥10μs) and wait times (5ms after reset, 120ms after Sleep Out).

This module is an excellent choice for high-end wearable devices, smartwatches, and any compact IoT application requiring a high-resolution square IPS display with a modern high-speed QSPI interface and integrated touch panel support.