LS0395I15-MP-V2 3.95 inch TFT-LCD Module 720x720 16.7M Colors IPS
Product Keywords: 3.95″ LCD Module, COG+FPC+B/L, 720(RGB)×720 Resolution, 16.7M Colors, IPS (All Viewing), FL7703N Driver IC, MIPI Interface, 500 cd/m² Brightness, 6 Series 2 Parallel Backlight, -20°C to +70°C Operation.
1. Executive Summary & Product Positioning
The LS0395I15-MP-V2 is a 3.95-inch transmissive type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display) module developed by 立信(万安)智显科技有限公司 (Lesson Smart Display Technology Co., Ltd). It is composed of a TFT-LCD panel, a driver circuit, and a backlight unit. The panel size is 3.95 inch and the resolution is 720(RGB)*720, the panel can display up to 16.7M colors.
Product Positioning: This module features a high-resolution square IPS display with a brightness of 500 cd/m². With a MIPI DSI interface, it is well-suited for a wide range of applications such as industrial HMI, smart home devices, smart appliances, and other embedded display systems that require high color accuracy and wide viewing angles.
2. Detailed Product Overview & Architecture
The module's architecture is designed for robust performance and easy integration. The primary components include:
- TFT-LCD Panel: 3.95-inch diagonal, a-Si TFT active matrix, transmissive, IPS mode. Resolution is 720(RGB) × 720 pixels with an active area of 71.93 (H) × 71.93 (V) mm.
- Driver IC: The module uses the FL7703N driver IC, communicating via a MIPI DSI Interface. The pin description indicates support for up to 4 data lanes (D0 to D3).
- Backlight Unit (B/L): A white LED backlight with 6 series 2 parallel configuration. The typical driving condition is IF=40mA, Vf=18V (TYP). The typical surface luminance is 500 cd/m².
- Mechanical Construction: COG (Chip-on-Glass) + FPC + B/L. The module outline dimensions for LCM+LENS are 74.83 (H) × 78.98 (V) × 2.07 (D) mm.
- Interface: The module communicates via a 30-pin FPC connector. The display interface is MIPI DSI.
- Display Mode: Active matrix TFT, Transmissive type, IPS.
- Viewing Direction (Grayscale Inversion): Free (IPS).
3. Exhaustive Technical Specifications
3.1 General & Mechanical Specifications
| Item | Specification |
| Display Size (Diagonal) | 3.95 inches |
| Resolution (Dots) | 720(RGB) × 720 |
| Display Technology | Active Matrix TFT, Transmissive, a-Si, IPS |
| Module Construction | COG+FPC+B/L |
| Color Depth | 16.7M Colors |
| Viewing Direction (Grayscale Inversion) | Free (IPS) |
| Input Data Interface | MIPI DSI (4 Lanes) |
| Driver IC | FL7703N |
| LCM+LENS Module Size (H×V×D) | 74.83 × 78.98 × 2.07 mm |
| Active Area (AA, H×V) | 71.93 × 71.93 mm |
| Pixel Arrangement | RGB Dot-matrix (720(RGB)×720) |
| Display Mode | Active matrix TFT, Transmissive type |
| Backlight Configuration | 6 Series 2 Parallel |
| Operating Temperature | -20°C to +70°C |
| Storage Temperature | -30°C to +80°C |
3.2 Absolute Maximum Ratings
Stress beyond those listed may cause permanent damage.
| Item | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| Supply voltage (IOVCC) | IOVCC | -0.3 | 5.5 | V |
| Supply voltage (VCI) | VCI | -0.3 | 6.6 | V |
| Operating temperature | TOPR | -20 | 70 | °C |
| Storage temperature | TSTR | -30 | 80 | °C |
3.3 Electrical Characteristics
3.3.1 Recommended Operating Conditions
| Item | Symbol | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Supply voltage | VCI | 2.5 | 2.8 | 3.3 | V |
| I/O supply voltage | IOVCC | 1.65 | 1.8 | 3.3 | V |
| Input voltage "H" level | VIH | 0.7*IOVCC | --- | IOVCC | V |
| Input voltage "L" level | VIL | 0 | --- | 0.3*IOVCC | V |
3.3.2 Backlight LED Characteristics
The backlight drive condition is IF=40mA, Vf=18V (TYP).
| Parameter | Symbol | Typ | Unit |
|---|---|---|---|
| Forward Voltage | Vf | 18 | V |
| Forward Current | If | 40 | mA |
| Surface Luminance | L | 500 | cd/m² |
3.4 Interface Pin Assignment (30-Pin FPC, MIPI DSI)
Connector: OK-14GM030-04. Interface: MIPI DSI (4 Lanes).
| PIN NO. | Symbol | Description |
|---|---|---|
| 1 | GND | Ground |
| 2 | D1N | MIPI Data Lane 1 Negative |
| 3 | D1P | MIPI Data Lane 1 Positive |
| 4 | GND | Ground |
| 5 | CLKN | MIPI Clock Negative |
| 6 | CLKP | MIPI Clock Positive |
| 7 | GND | Ground |
| 8 | D0N | MIPI Data Lane 0 Negative |
| 9 | D0P | MIPI Data Lane 0 Positive |
| 10 | GND | Ground |
| 11 | D2N | MIPI Data Lane 2 Negative |
| 12 | D2P | MIPI Data Lane 2 Positive |
| 13 | GND | Ground |
| 14 | D3N | MIPI Data Lane 3 Negative |
| 15 | D3P | MIPI Data Lane 3 Positive |
| 16-18 | GND | Ground |
| 19 | LEDK | Backlight Cathode |
| 20 | LEDK | Backlight Cathode |
| 21 | LEDA | Backlight Anode |
| 22 | LEDA | Backlight Anode |
| 23 | NC | Not Connect |
| 24 | GND | Ground |
| 25 | GND | Ground |
| 26 | GND | Ground |
| 27 | RST | Reset Signal (Low Active) |
| 28 | VCC | Power Supply (VCI) |
| 29 | IOVCC | I/O Power Supply |
| 30 | GND | Ground |
3.5 Timing Characteristics
3.5.1 MIPI DSI High Speed Mode Characteristics
Test conditions: A=0V, IOVCC=1.65V to 3.3V, VCI=2.5V to 3.3V, TA = -30 to 70°C.
| Signal | Item | Symbol | Min. | Max. | Unit |
|---|---|---|---|---|---|
| DSI_CP/DSI_CN | Double UI instantaneous (4 Lanes) | 2xUINST | 3.30 | 25 | ns |
| DSI_CP/DSI_CN | UI instantaneous (4 Lanes) | UINST | 1.67 | 12.5 | ns |
| DP/DN | Data to clock setup time | TDS | 0.15xUI | - | ps |
| DP/DN | Data to clock hold time | TDH | 0.15xUI | - | ps |
| DSI_CP/DSI_CN | Differential rise time for clock | TDRTCLK | 150 | 0.3UI | ps |
| DSI_CP/DSI_CN | Differential fall time for clock | TDFTCLK | 150 | 0.3UI | ps |
| DP/DN | Differential rise time for data | TDRTDATA | 150 | 0.3UI | ps |
| DP/DN | Differential fall time for data | TDFTDATA | 150 | 0.3UI | ps |
3.5.2 MIPI DSI Low Power Mode Characteristics
Test conditions: A=0V, IOVCC=1.65V to 3.3V, VCI=2.3V to 3.3V, TA = -30 to 70°C.
| Signal | Item | Symbol | Min. | Max. | Unit |
|---|---|---|---|---|---|
| DSI_D0P/DSI_D0N | Length of LP-00/LP01/LP10/LP11 (Host → Module) | TLPXM | 50 | - | ns |
| DSI_D0P/DSI_D0N | Length of LP-00/LP01/LP10/LP11 (Module → Host) | TLPXD | 50 | - | ns |
| DSI_D0P/DSI_D0N | Time-out before MPU start driver | TTA-SURE | TLPXD | 2xTLPXD | ns |
| DSI_D0P/DSI_D0N | Time to drive LP-00 by module | TTA-GET | 5xTLPXD | - | ns |
| DSI_D0P/DSI_D0N | Time to drive LP-00 after turnaround request | TTAGO | 4xTLPXD | - | ns |
3.6 Electro-Optical Characteristics
| Item | Symbol | Condition | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| Response time | Tr+Tf | θx=θy=0 | --- | 30 | 40 | ms |
| Contrast Ratio | CR | θx=θy=0 | 900 | 1200 | --- | --- |
| Transmittance | T% | θx=θy=0 | 4.2 | 4.8 | --- | % |
| White Color Chromaticity (CIE1931) | Wx | θx=θy=0 | --- | 0.294 | --- | --- |
| Wy | θx=θy=0 | --- | 0.323 | --- | --- | |
| Viewing angle (CR > 10) | θT (Top) | --- | 80 | 85 | --- | Deg. |
| θB (Bottom) | --- | 80 | 85 | --- | Deg. | |
| θL (Left) | --- | 80 | 85 | --- | Deg. | |
| θR (Right) | --- | 80 | 85 | --- | Deg. | |
| LCM Luminance | L | IF=40mA | --- | 500 | --- | cd/m² |
3.7 Design Notes from Documentation
- B/L Driver: The backlight driving condition is IF=40mA, Vf=18V (TYP) for 6S2P configuration.
- Mechanical: Tolerance of segments to edge of glass: ±0.2mm. Steel plate reinforcement (钢片补强 T=0.2) is included. The FPC includes a steel sheet reinforcement with a total thickness of 0.30mm (FPC+钢片补强
- Housing: It is recommended that the housing visual area be at least 0.3mm smaller than the VA (Viewing Area) on each side. The housing foam window should be at least 0.6mm larger than the VA on each side. TP edge should not contact metal conductors to avoid ESD or short circuit risks.
- RoHS: RoHS compliance is expected.
- Connector: The FPC connector model is OK-14GM030-04.
4. Application Guidelines & Critical Notes
- Power Supply: The module requires a 2.8V (Typ.) power supply for VCI and 1.8V (Typ.) for IOVCC. Ensure the power supply ripple is minimized.
- Interface: This module uses a standard 4-Lane MIPI DSI protocol. The host processor must be configured for this protocol.
- Backlight Driver (External): An external constant current driver is required to supply a typical current of 40mA at a forward voltage of 18V.
- Reset: A hardware reset pin (RST, Pin 27) is provided. A low pulse of at least 10µs is required for a valid reset.
- Handling Precautions: Handle the module with care to avoid damage to the glass or FPC. Ground yourself to prevent electrostatic discharge (ESD).
5. Conclusion & Design-In Support
The LS0395I15-MP-V2 from Lesson Smart Display Technology is a 3.95-inch IPS TFT-LCD module with a unique square resolution. It is a high-brightness, wide-viewing-angle display solution suitable for a wide variety of embedded display applications.
For successful design-in, engineers should:
- Obtain and review the complete, official Product Specification (Revision 1.0) for the full mechanical drawing and the FL7703N driver IC datasheet for detailed command initialization.
- Design a clean 2.8V/1.8V power supply and a backlight constant current driver circuit capable of delivering 40mA at 18V.
- Configure the host processor's MIPI DSI interface to match the timing specifications detailed in this datasheet.
- Contact the manufacturer for evaluation modules, sample requests, and further technical support during the design-in phase.
This module is designed to provide a reliable and vibrant display solution for a wide array of applications.
