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LS070I13-MP-V1: 7.0-Inch a-Si TFT LCD Module, 1024×600 Resolution, MIPI DSI Interface, Color Active Matrix, RoHS Compliant

LS070I13-MP-V1: 7.0-Inch a-Si TFT LCD Module, 1024×600 Resolution, MIPI DSI Interface, Color Active Matrix, RoHS Compliant

Product Subtitle / Keywords

7.0 Inch Display, 1024×600 Resolution, Color Active Matrix a-Si TFT-LCD Module, MIPI DSI Interface (4 Data Lanes + 1 Clock Lane), Driver IC + FPC + Backlight Unit, -20°C to +70°C Operating Temperature, -30°C to +80°C Storage Temperature, Supply Voltage (VDD: -0.3 to 2.8V, AVDD: -0.5 to 14.85V, VGH: -0.3 to 40V, VGL: -20 to 0.3V), Digital Power Current 30mA (Typ) / 45mA (Max), Analog Power Current 35mA (Typ) / 45mA (Max), Gate On Power Current 0.5mA (Typ) / 1mA (Max), Gate Off Power Current 0.5mA (Typ) / 1mA (Max), RoHS Compliant, 2020/06/12

1. Executive Summary & Product Positioning

The LS070I13-MP-V1, developed by Lixin (Wan'an) Smart Display Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 7.0-inch color active matrix a-Si TFT-LCD module incorporating amorphous silicon TFT (Thin Film Transistor).

This product specification (Version 1.0, dated 2020/06/12) serves as the definitive technical document, defining its general specifications (including resolution of 1024×600 pixels and RoHS compliance), absolute maximum ratings, electrical characteristics (current consumption for VGH, VGL, VDD, and AVDD), backlight characteristics, dimensional drawing, complete MIPI DSI interface pin connections, electro-optical characteristics, inspection criteria, reliability, and precautions for using LCD modules.

The document provides the core parameters necessary for system integration into embedded display applications requiring a standard 7.0-inch display with a MIPI DSI interface. The unequivocal recommendation for engineers is to strictly adhere to the electrical specifications, interface timing, and mechanical tolerances described herein to ensure reliable performance and compatibility.

2. Detailed Product Overview & Architecture

  • Core Technology: Color active matrix a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display) module. It is composed of a color TFT-LCD panel, driver IC, FPC and a back light unit.
  • Display Format: Graphic 1024×600 pixel array (WSVGA resolution).
  • Module Construction: Color TFT-LCD panel, driver IC, FPC (Flexible Printed Circuit), and a back light unit.
  • Interface Type: MIPI DSI (4 data lanes + 1 clock lane as per pin connections).
  • Regulatory Compliance: This product accords with RoHS environmental criterion.

3. Exhaustive Technical Specifications

3.1 Mechanical & Physical Specifications

Module Model LS070I13-MP-V1
LCD Type Color Active Matrix TFT-LCD
Display Size (Diagonal) 7.0 inch
Resolution 1024 × 600 pixels
Construction Color TFT-LCD panel, driver IC, FPC, back light unit
Environmental Standard RoHS Compliant
Document Version / Release Date 1.0 / 2020-06-12

3.2 Electrical & Interface Specifications

3.2.1 Absolute Maximum Ratings (AGND=GND=0V, Ta = 25°C)

ITEM Symbol Min Max Unit
Digital Supply Voltage VDD -0.3 2.8 V
Analog Supply Voltage AVDD -0.5 14.85 V
Gate On Voltage VGH -0.3 40 V
Gate Off Voltage VGL -20 0.3 V
Gate On-Gate Off Voltage VGH-VGL 12 40 V
Operation Temperature Top -20 70 °C
Storage Temperature Tstg -30 80 °C

Note 1: If users use the product out off the environmental operation range (temperature and humidity), it will have visual quality concerns.

3.2.2 Current Consumption

Item Symbol Condition Min. Typ. Max. Unit
Gate on power Current IVGH VGH = 18 V - 0.5 1 mA
Gate off power current IVGL VGL = -6V - 0.5 1 mA
Digital power current IVDD VDD = 3.3V - 30 45 mA
Analog power current IAVDD AVDD = 9.6V - 35 45 mA

Note 2: For reference to detailed testing conditions.

3.2.3 Pin Description (30-pin FPC - MIPI DSI Interface)

The module uses a 30-pin interface with a MIPI DSI configuration that includes 4 data lanes and 1 clock lane. The full pin assignments are detailed below:

Pin No. Symbol Type Function
1,2 LED+ P LED Anode
3 LCD_VGH P Positive power for TFT
4 LCD_VGL P Negative power for TFT
5 UPDN I Vertical inversion control
6 SHLR I Horizontal inversion control
7,8 LED- P LED Cathode
9 LCD+10V P (AVDD) Power for Analog Circuit
10 GND P Ground
11 MIPI_TDP3 I Positive MIPI differential data inputs (Lane 3)
12 MIPI_TDN3 I Negative MIPI differential data inputs (Lane 3)
13 GND P Ground
14 MIPI_TDP2 I Positive MIPI differential data inputs (Lane 2)
15 MIPI_TDN2 I Negative MIPI differential data inputs (Lane 2)
16 GND P Ground
17 MIPI_TCP I Positive MIPI differential clock inputs
18 MIPI_TCN I Negative MIPI differential clock inputs
19 GND P Ground
20 MIPI_TDP1 I Positive MIPI differential data inputs (Lane 1)
21 MIPI_TDN1 I Negative MIPI differential data inputs (Lane 1)
22 GND P Ground
23 MIPI_TDP0 I/O Positive MIPI differential data inputs (Lane 0)
24 MIPI_TDN0 I/O Negative MIPI differential data inputs (Lane 0)
25 GND P Ground
26 STBYB I Standby mode, normally pull high. STBYB="1", normal operation. STBYB="0", timing control, source driver will turn off, all output are high-Z.
27 LRSTB I Global reset pin. Active low to enter reset state.
28 VDD P (1.8V) Digital power
29 VDD P (1.8V) Digital power
30 VCOM P Common voltage

Interface Summary:

  • MIPI Interface: Uses 4 data lanes (TDP3/TDN3, TDP2/TDN2, TDP1/TDN1, TDP0/TDN0) and 1 clock lane (TCP/TCN) for high-speed serial data transmission.
  • Backlight: LED+ (Pins 1, 2) for LED Anode and LED- (Pins 7, 8) for LED Cathode.
  • Power: VDD (Pins 28, 29) for Digital Power (1.8V), LCD+10V (Pin 9) for Analog Circuit Power (AVDD), LCD_VGH (Pin 3) for Gate ON Voltage, LCD_VGL (Pin 4) for Gate OFF Voltage, GND (Pins 10, 13, 16, 19, 22, 25) for ground.
  • Control: UPDN (Pin 5) for vertical inversion, SHLR (Pin 6) for horizontal inversion, STBYB (Pin 26) for standby mode control, LRSTB (Pin 27) for hardware reset, VCOM (Pin 30) for common voltage.

3.2.4 Timing Characteristics (DE Mode for 1024RGB*600)

Parameter Symbol Min. Typ. Max. Unit
DCLK Frequency fclk 40.8 51.2 67.2 MHz
Horizontal Display Area thd 1024 1024 1024 DCLK
HSD Period th 1114 1344 1400 DCLK
HSD Blanking thb+ thfp 90 320 376 DCLK
Vertical Display Area tvd 600 600 600 TH
VSD Period tv 610 635 800 TH
VSD Blanking tvbp+ tvfp 10 35 200 TH

3.3 Storage and Handling Conditions

The specification includes recommended storage conditions: Temperature: 25°±10°C, Humidity: 65%RH±20%RH. These conditions help maintain the adhesion of the reflective film (diffuser film) to the light guide plate (plastic frame).

3.4 General Precautions (From Specification)

  • Install the LCD Module by using the mounting holes. Make sure it is free of twisting, warping and distortion. Do not forcibly pull or bend the I/O cable or the backlight cable.
  • Do not attempt to disassemble or process the LCD Module.
  • NC terminal should be open. Do not connect anything.
  • If the logic circuit power is off, do not apply the input signals.
  • To prevent destruction of the elements by static electricity, be careful to maintain an optimum work environment. Be sure to ground the body when handling the LCD Module.
  • Tools required for assembling, such as soldering irons, must be properly grounded.
  • To reduce the amount of static electricity generated, do not conduct assembling and other work under dry conditions.
  • The LCD Module is coated with a film to protect the display surface. Exercise care when peeling off this protective film since static electricity may be generated.

3.5 Precautions for Soldering

  • Soldering iron temperature: 280 ±10°C.
  • Soldering time: 3-4 sec.
  • Solder: eutectic solder.
  • If soldering flux is used, be sure to remove any remaining flux after finishing the soldering operation.

3.6 Precautions for Operation

  • Viewing angle varies with the change of liquid crystal driving voltage (Vo). Adjust Vo to show the best contrast.
  • Driving the LCD in the voltage above the limit will shorten its lifetime.
  • Response time is greatly delayed at temperature below the operating temperature range. However, this does not mean the LCD will be out of order. It will recover when it returns to the specified temperature range.
  • If the display area is pushed hard during operation, the display will become abnormal. However, it will return to normal if it is turned off and then on.
  • Condensation on terminals can cause an electrochemical reaction disrupting the terminal circuit. Therefore, it must be used under the relative condition of 40°C, 50% RH.
  • When turning the power on, input each signal after the positive/negative voltage becomes stable.

4. Application Guidelines & Critical Notes

Intended Use

  • Industrial control panels and human-machine interfaces (HMIs)
  • Portable media players and handheld devices
  • Any application requiring a standard 7.0-inch display with a MIPI DSI interface

Critical Design Considerations

  1. Interface (4-lane MIPI DSI): This module uses a MIPI DSI interface with 4 data lanes (MIPI_TDP3/TDN3, TDP2/TDN2, TDP1/TDN1, TDP0/TDN0) and 1 clock lane (MIPI_TCP/TCN). The host controller must be capable of 4-lane MIPI operation for the 1024×600 resolution.
  2. Power Supply: Provide stable voltages: VDD (1.8V) for Digital Power, AVDD (via LCD+10V pin, typical 9.6V based on current consumption specs) for Analog Circuit, VGH (typical 18V based on test conditions) for Gate ON Voltage, and VGL (typical -6V based on test conditions) for Gate OFF Voltage. The backlight requires a constant-current LED driver for the LED+ and LED- pins.
  3. Display Orientation Control: Pins UPDN (Pin 5) and SHLR (Pin 6) allow for vertical and horizontal inversion of the display. When L/R="0", set right to left scan direction. When L/R="1", set left to right scan direction. When U/D="0", set top to bottom scan direction. When U/D="1", set bottom to top scan direction.
  4. Standby Mode: The STBYB (Pin 26) pin controls standby mode. STBYB="1" for normal operation; STBYB="0" to turn off timing controller and source driver (all outputs become High-Z).
  5. Reset: The LRSTB (Pin 27) pin is a global reset pin. Active low to enter reset state. Ensure it is held low for a sufficient period during power-up to guarantee proper initialization.
  6. Temperature Limits: Operating Temperature: -20°C to +70°C. Storage Temperature: -30°C to +80°C.
  7. Power Sequencing: The power must be turned on in the correct sequence to prevent damage to the device: After VDD (1.8V) is stable, the display interface and control signals can be applied. The backlight should be applied after the logic power is fully stable. When turning the power on, input each signal after the positive/negative voltage becomes stable.
  8. Precautions: Do not apply input signals when logic circuit power is off. NC terminals should be open. Handle with ESD precautions.

Handling & Compliance

  • The module is RoHS compliant (according with RoHS environmental criterion).
  • Observe standard ESD precautions during handling and assembly.
  • The module contains fragile glass and FPC – handle with care.
  • Avoid bending the FPC sharply, especially near the connector interface.
  • Do not attempt to disassemble or process the LCD Module.
  • NC terminals should be open. Do not connect anything.
  • If the logic circuit power is off, do not apply the input signals.
  • Recommended cleaning solvent: N-hexane for adhesives.

5. Conclusion & Design-In Support

The LS070I13-MP-V1 specification details a standard 7.0-inch WSVGA display module with a 4-lane MIPI DSI interface, RoHS compliance, and comprehensive safety and handling guidelines — an excellent choice for applications requiring a reliable and standard 7.0-inch display with a high-speed serial interface.

Key Strengths

  • WSVGA Resolution (1024×600): Provides adequate image quality for a 7.0-inch display.
  • MIPI Interface (4 Data Lanes + 1 Clock): High-speed serial interface suitable for WSVGA video content.
  • RoHS Compliant: Environmentally friendly design.
  • Wide Operating Temperature Range: -20°C to +70°C for operation and -30°C to +80°C for storage.
  • Display Orientation Control: UPDN and SHLR pins allow for flexible display mounting and orientation.
  • Low Power Consumption: Digital power current at 30mA (Typ) / 45mA (Max) and Analog power current at 35mA (Typ) / 45mA (Max).
  • Comprehensive Precautions: Detailed handling, soldering, and operation guidelines ensure reliable long-term performance.

Main Design Focus

  • The critical design task is properly configuring the MIPI DSI interface on the host processor for 4-lane operation and ensuring reliable high-speed data transfer for 1024×600 resolution with a DCLK frequency of 40.8~67.2 MHz (typical 51.2 MHz).
  • Supporting requirements: Provide stable VDD (1.8V), AVDD (9.6V typical), VGH (18V typical), and VGL (-6V typical) power supplies. Provide a constant-current backlight driver for the LED backlight. Follow the proper power sequencing and ESD precautions. Ensure proper mechanical mounting using the mounting holes without twisting or warping the module.

This module is an excellent choice for industrial control panels, HMIs, and any embedded system requiring a standard 7.0-inch display with a MIPI interface and RoHS compliance.

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Eddie Chen
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