LS101I27-MP-V1: 10.1-Inch TFT LCD Module, 800×1280 WXGA Resolution, MIPI Interface, Integrated PWM Brightness Control
Product Subtitle / Keywords
10.1 Inch Display, 800(RGB)×1280 WXGA Resolution, Transmissive a-Si TFT-LCD Module, MIPI Differential Data & Clock Input (4-Lane), Display Colors 16.7M, Supply Voltage VDD1=+1.8V (Typ), VSP=+5.8V (Typ), VSN=-5.8V (Typ), Integrated PWM Brightness Control (CABC), DBV[11:0] Register, CABCPWM_OUT Duty Cycle Control, Supply Voltage for Logic VDD1=+1.7~+1.9V, Power Supply Voltage VSP=+5.7~+5.9V, VSN=-5.9~-5.7V, Lesson Smart Display Technology Co., Ltd
1. Executive Summary & Product Positioning
The LS101I27-MP-V1, developed by Lesson Smart Display Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 10.1-inch TFT LCD module with a resolution of 800(RGB)×1280 (WXGA). The specification, published on 2022-12-27, details its absolute maximum ratings, DC electrical characteristics, and interface definitions, with a particular emphasis on a sophisticated built-in brightness control block (CABC) using PWM.
This product specification serves as the definitive technical document, defining the module's physical interface (MIPI), power supply requirements, and unique integrated brightness control mechanism. The unequivocal recommendation for engineers is to strictly adhere to the multi-rail power supply voltages (VDD1, VSP, VSN) and the PWM brightness control parameters described herein to ensure reliable performance and optimal display brightness management.
2. Detailed Product Overview & Architecture
- Core Technology: Transmissive type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display) module, which is composed of a TFT-LCD panel, a driver circuit and a backlight unit.
- Display Resolution: WXGA: 800(RGB)*1280 pixel array.
- Interface Type: MIPI (Mobile Industry Processor Interface) Differential Data and Clock Input, with data input on pins D0 to D3 (4 lanes) and clock input on CLKP/CLKN.
- Display Colors: Up to 16.7M colors.
- Power Architecture: Requires a triple-rail power supply: Logic (VDD1=+1.8V), Positive Analog (VSP=+5.8V), and Negative Analog (VSN=-5.8V).
- Brightness Control: Features a dedicated Brightness Control Block with a built-in digital brightness value (DBV[11:0]) and an external PWM output (CABCPWM_OUT) for controlling an external LED driver IC.
3. Exhaustive Technical Specifications
3.1 Mechanical & Physical Specifications
| Parameter | Specification | Unit |
|---|---|---|
| Module Model | LS101I27-MP-V1 | - |
| LCD Size (Diagonal) | 10.1 | inch |
| Resolution | 800(RGB) × 1280 (WXGA) | Pixels |
| Display Type | Transmissive a-Si TFT-LCD | - |
| Interface Type | MIPI Differential Data & Clock Input (4-Lane: D0P/N to D3P/N, CLKP/N) | - |
| Display Colors | 16.7M | - |
| Logic Supply Voltage (VDD1) | +1.7 to +1.9 (Typ +1.8) | V |
| Positive Analog Supply (VSP) | +5.7 to +5.9 (Typ +5.8) | V |
| Negative Analog Supply (VSN) | -5.9 to -5.7 (Typ -5.8) | V |
| Power Pins | AVDD (5.8V), AVEE (-5.8V), DVDD (NC) | - |
| Backlight Pins | VLED (Anode), FB1-6 (Cathode connections) | - |
| Supplier | 立信(万安)智显科技有限公司 (Lesson Smart Display Technology Co.,Ltd) | - |
| Document Date | 2022-12-27 | - |
3.2 Electrical & Interface Specifications
3.2.1 Absolute Maximum Ratings
The absolute maximum ratings are the limits the product can withstand for short periods. Exceeding these limits can cause permanent damage.
| Parameter | Symbol | Min. | Max. | Unit |
|---|---|---|---|---|
| Supply voltage for logic | VDD1 | -0.3 | +2 | V |
| Power supply voltage | VSP ~ VSSA | -0.3 | +6.5 | V |
| Power supply voltage | VSSA ~ VSN | +0.3 | -6.5 | V |
3.2.2 DC Electrical Characteristics (Operating Conditions)
| Parameter | Symbol | Min. | Typ | Max. | Unit |
|---|---|---|---|---|---|
| Supply voltage for logic | VDD1 | +1.7 | +1.8 | +1.9 | V |
| Power supply voltage | VSP | +5.7 | +5.8 | +5.9 | V |
| Power supply voltage | VSN | -5.9 | -5.8 | -5.7 | V |
| Input Current | Idd | - | TBD | TBD | mA |
| Input voltage 'H' level | VIH | 0.7* VSP | - | VSP | V |
| Input voltage 'L' level | VIL | AVSS | - | 0.3* VSP | V |
3.2.3 Interface Pin Assignment (Input Terminal)
The module features a 32-pin interface. Key power and signal pins are:
| PIN No. | Symbol | Function | Remark |
|---|---|---|---|
| 1, 2 | VLED | Anode | Backlight LED supply (+) |
| 3, 4 | NC | NC | No connection |
| 5-10 | FB1- FB6 | Cathode | LED Backlight feedback return (-) |
| 11, 17, 18, 21, 24, 27, 30 | GND | Ground | Ground reference for all signals |
| 12, 13 | DVDD, VDD18 | NC | Not connected (self-generated) |
| 14 | NC | NC | No connection |
| 15 | AVDD | Power Supply 5.8V | Positive analog supply (VSP) |
| 16 | AVEE | Power Supply -5.8V | Negative analog supply (VSN) |
| 19, 20 | D0P, D0N | MIPI Differential Data Input | MIPI DSI Lane 0 (±) |
| 22, 23 | D1P, D1N | MIPI Differential Data Input | MIPI DSI Lane 1 (±) |
| 25, 26 | CLKP, CLKN | MIPI Differential Clock Input | MIPI DSI Clock Lane (±) |
| 28, 29 | D2P, D2N | MIPI Differential Data Input | MIPI DSI Lane 2 (±) |
| 31, 32 | D3P, D3N | MIPI Differential Data Input | MIPI DSI Lane 3 (±) |
3.3 Brightness Control Block (CABC PWM)
The module includes a sophisticated Content Adaptive Brightness Control (CABC) block for power saving and fine-grained brightness management.
- CABC External Output: The block generates an external output signal, CABCPWM_OUT, to control an external LED driver IC. This enables the display to control overall brightness.
- Manual Brightness Setting (DBV): A 12-bit register, DBV[11:0] at address R51h, sets the manual display brightness value. The value ranges from 0 to 4095 (2^12 - 1).
- Duty Cycle Calculation: The final CABCPWM_OUT duty cycle is calculated as:
(DBV[11:0]) / 4095 x CABC duty. The CABC duty is generated after analyzing the content of one frame of display data.
Example Calculation
The specification provides a complete example:
- Given: CABC_PWM_OUT period = 2.95 ms, DBV[11:0] (R51h) = '2048' decimal, CABC duty = 74.42%.
- Calculation: CABC_PWM_OUT duty = (2048 / 4095) × 74.42% = 37.22%.
- Resulting Pulse: With a period of 2.95ms, the high-level (active) duration is 1.10ms, and the low-level duration is 1.85ms.
Special Architecture II Mode
When the Architecture II module is used (BL control bit '0'), the CABCPWM_OUT is always output low, and the DBV register (R51h) will read a fixed value of 1084 decimal (which equals 26.47% duty cycle).
4. Application Guidelines & Critical Notes
Intended Use
- 10.1-inch display applications requiring WXGA (800×1280) resolution.
- Systems utilizing a MIPI DSI interface for video input.
- Applications where sophisticated, content-adaptive brightness control (CABC) is desired to save power and enhance user experience.
- Products designed to use an external LED driver IC controlled by a PWM signal from the display module.
Critical Design Considerations
- MIPI DSI Interface Configuration: The module uses 4 MIPI data lanes (D0 through D3) plus a clock lane (CLK). The host processor must be configured for 4-lane MIPI DSI operation at WXGA resolution (800×1280).
- Triple-Rail Power Supply: The module requires three separate, tightly regulated power supplies: VDD1 (+1.8V) for logic, AVDD/VSP (+5.8V) for positive analog, and AVEE/VSN (-5.8V) for the negative analog rail. A dedicated PMIC or multiple DC-DC converters are necessary.
- Important Pin Notes:
- DVDD (Pin 12) & VDD18 (Pin 13): These pins are marked as NC (No Connection). The internal logic power is generated from other supplies. Do not connect these pins.
- Backlight Pins (VLED, FB1-6): Pins 1 & 2 (VLED) are the backlight Anode (+), typically connected to the output of an external LED driver IC. Pins 5-10 (FB1-6) are the Cathode (-) returns for the backlight LED strings. The backlight driver is fully external and is controlled by the CABCPWM_OUT signal described below.
- Integrated PWM Brightness Control (CABC): This is a key feature. The display module internally calculates an optimal backlight duty cycle based on the frame content (CABC duty) and combines it with a manual register setting (DBV). The final PWM signal (CABCPWM_OUT) must be routed to the external LED driver IC's control pin.
- External LED Driver Required: The module does not have a built-in LED driver. It requires an external LED driver IC to supply the backlight current. The module provides the control signal (CABCPWM_OUT) and the LED negative feedback paths (FB pins).
- DBV Register Setting: The 12-bit DBV register (R51h) allows for 4096 steps of manual backlight adjustment. The CABC duty, based on content analysis, further multiplies this value for dynamic, power-saving control.
- Architecture II Mode (BL='0'): When the BL bit is set to '0' (indicating Architecture II mode), the external PWM output (CABCPWM_OUT) is forced low (LED off externally). In this mode, the DBV register value will be fixed to 1084 (26.47%).
Handling & Compliance
- Observe standard ESD precautions during handling and assembly.
- The module contains fragile glass and a precision FPC – handle with care.
- Do not attempt to disassemble or modify the LCD module.
- All NC (No Connection) pins should be left open.
5. Conclusion & Design-In Support
The LS101I27-MP-V1 specification details a 10.1-inch WXGA TFT display module with a standard 4-lane MIPI interface and a unique integrated Content Adaptive Brightness Control (CABC) block that provides an external PWM output for driving an external LED driver.
Key Strengths
- Standard 4-Lane MIPI Interface: Simple connection to common mobile and embedded processors.
- Integrated CABC PWM Control: Enables sophisticated power-saving through content-adaptive backlight dimming without additional external sensors or calculations.
- Flexible Brightness Control: Combines a manual 12-bit brightness register (DBV) with automatic content analysis for fine-grained control.
- Well-Defined Pinout: Clear 32-pin interface with dedicated power (AVDD, AVEE) and feedback (FB1-6) pins for the external LED driver connection.
Main Design Focus
- The critical design task is implementing the triple-rail power supply (VDD1=+1.8V, VSP=+5.8V, VSN=-5.8V) and selecting an external LED driver IC that accepts an external PWM dimming control signal (CABCPWM_OUT).
- Supporting requirements: Configure the host's MIPI DSI transmitter for 4 lanes at WXGA resolution. Route the CABCPWM_OUT signal from the FPC to the LED driver IC's PWM dimming input. Provide the backlight LED strings with connections to VLED (Anode) and FB1-6 (Cathode).
This module is an excellent choice for applications requiring a standard 10.1-inch MIPI display with advanced, built-in power-saving brightness control features and an external LED driver design.
