Product Subtitle / Keywords:
Square Format LCD, 3.95 Inch IPS Display, 720x720 High Pixel Density, Transmissive a-Si TFT, MIPI DSI High-Speed/Low-Power Mode, FL7703N Driver IC, COG+FPC+B/L Structure, High Brightness 500 cd/m², Wide Viewing Angle 85/85/85/85, -20°C to +70°C Operation, Detailed Reset Timing, RoHS Compliant
Comprehensive Technical Specification & Application Guide
1. Executive Summary & Product Positioning
The LS0395I13L-MP-V2, developed by LESSON (Wan‘an) Zhixian Technology Co., Ltd., is a high-performance 3.95-inch transmissive amorphous Silicon TFT-LCD module. This comprehensive product specification book meticulously defines its structural composition, physical and mechanical dimensions, electrical characteristics, pin functions, detailed timing for both high-speed and low-power MIPI DSI modes, and comprehensive electro-optical performance parameters. The module features a square form factor with a 3.95-inch diagonal, a high-resolution 720(RGB)×720 pixel array, and the capability to display 16.7 million colors. It is engineered to deliver high brightness (500 cd/m² typical) and wide viewing angles (85° typical), making it ideal for applications requiring excellent readability from various angles and in bright environments. The specification provides exhaustive data on operating temperature ranges, electrical limits, and critical timing constraints, particularly for the reset function. The unequivocal recommendation for manufacturers and end-users is to strictly base their design matching and reliability verification on the mechanical, electrical, and optical parameters outlined herein. This disciplined approach is the only way to ensure full compatibility with host systems and guarantee that the module's performance meets or exceeds the specified standards throughout its operational life.
2. Detailed Product Overview & Architecture
- Core Technology: Transmissive-type a-Si TFT-LCD with an IPS (In-Plane Switching) panel. IPS technology is explicitly noted, confirming its wide viewing angle and superior color consistency.
- Display Characteristics: Capable of displaying up to 16.7 million colors. The square 1:1 aspect ratio (720x720) is distinctive, suitable for circular dials, symmetric UIs, or applications where vertical and horizontal information density is equally important.
- Module Construction: Employs a COG (Chip-On-Glass) + FPC (Flexible Printed Circuit) + B/L (Backlight Unit) structure. The driver IC is mounted directly on the glass for a compact profile.
- Interface Focus: Designed for modern host processors, utilizing the MIPI DSI interface with clearly defined high-speed and low-power mode characteristics.
3. Exhaustive Technical Specifications
3.1 Mechanical & Physical Specifications
- Panel Size (Diagonal): 3.95 inches
- Active Display Area (H×V): 71.93 mm × 71.93 mm (Perfect square)
- Module Size (with Lens, H×V×D): 74.83 mm × 79.98 mm × 2.07 mm
- Number of Dots (Resolution): 720 (RGB) × 720 pixels
- Pixel Pitch: ~0.1 mm (calculated), indicating high pixel density for sharp imagery.
3.2 Optical & Electro-Optical Characteristics (Typical @ Ta=25°C)
- Luminance (LCM, IF=40mA): 400 cd/m² (Minimum), 500 cd/m² (Typical), ensuring high visibility.
- Contrast Ratio (CR): 900 (Min), 1200 (Typ) @ center, 0° viewing angle.
- Viewing Angle (CR > 10): 80° (Min), 85° (Typ) for all directions (Left, Right, Up, Down). This is a key benefit of the IPS panel.
- Response Time (Tr + Tf): 30 ms (Typical), 40 ms (Maximum).
- Transmittance (T%): 4.2% (Min), 4.8% (Typ).
- White Point Chromaticity (CIE1931): Wx ≈ 0.294, Wy ≈ 0.323 (Typical).
- Color Gamut: Implied by the 16.7M color capability.
3.3 Electrical & Interface Specifications
- Interface Type: MIPI DSI. The specification includes exhaustive timing tables for High-Speed Mode and Low-Power Mode, including Bus Turn-Around (BTA) timing.
- Driver IC: FL7703N.
- Absolute Maximum Ratings:
- Supply Voltage (IOVCC): -0.3V to +5.5V
- Operating Temperature (TOPR): -20°C to +70°C
- Storage Temperature (TSTR): -30°C to +80°C
- Electrical Characteristics (Typical Operating Conditions):
- Positive Supply (VSP): 4.5V to 6.2V (Typ. 5.5V)
- Negative Supply (VSN): -6.2V to -4.5V (Typ. -5.5V)
- I/O Voltage (IOVCC): 1.65V to 3.3V (Typ. 1.8V)
- Input Logic Levels: VIL ≤ 0.3IOVCC; VIH ≥ 0.7IOVCC
- Backlight Unit (BLU): Driven at IF=40mA with a typical forward voltage (Vf) of 18V.
3.4 Pin Description (32-pin Hirose BK13C06-32DP Connector)
A detailed 32-pin pinout is provided, crucial for interface design:
- Power & Ground: VSP, VSN, IOVCC, VCOM, VGH, VGL, and multiple GND pins for noise reduction.
- MIPI Differential Signals:
- Clock Lane: CLKP (Pin 9), CLKN (Pin 8)
- Data Lanes 0-3: D0P/D0N (Pins 15/14), D1P/D1N (Pins 12/11), D2P/D2N (Pins 6/5), D3P/D3N (Pins 3/2). Note: D0P/D0N are designated as I/O for Bus Turn-Around.
- Other: VDDD (NC in this configuration).
3.5 Critical Timing & Functional Specifications
3.5.1 MIPI DSI High-Speed Mode Timing
Detailed parameters under conditions VSSA=0V, IOVCC=1.65V to 3.3V, VCI=2.5V to 3.3V, TA=-30 to 70°C:
- UI Instantaneous (UINSTA/B): 1.67 ns (4-Lane @ VDDD=1.8V)
- Double UI Instantaneous (2xUINST): 3.30 ns (4-Lane @ VDDD=1.8V)
- Data Setup/Hold Time (TDS/TDH): 0.15 x UI
- Differential Rise/Fall Times (Clock & Data): 150 ps (Min), Max = 0.3 x UI
3.5.2 MIPI DSI Low-Power Mode & Bus Turn-Around (BTA) Timing
Parameters under VCI=2.3V to 3.3V:
- LP State Length (Host→Module & Module→Host): TLPXM, TLPXD ≥ 50 ns
- Turn-Around Time-out (TTA-SURE): TLPXD to 2xTLPXD
- Time for Module to drive LP-00 (TTA-GET): ≥ 5xTLPXD
- Time to drive LP-00 after host request (TTAGO): ≥ 4xTLPXD
3.5.3 Reset Input Timing – A Critical Focus
- Reset Pulse Width (tRESW): Minimum 10 µs. The NRESET pin must be held low for at least this duration.
- Reset Complete Time (tREST):
- When reset in Sleep-In (SLPIN) mode: 15 ms (Min).
- When reset in Sleep-Out (SLPOUT) mode: 120 ms (Min).
- Mandatory Wait Time: It is necessary to wait 15 ms after releasing NRESET before sending any commands. Additionally, a Sleep Out command cannot be sent for 120 ms. This is explicitly stated and must be strictly followed in firmware.
- Spike Rejection: The reset circuit includes spike rejection; pulses shorter than 10µs are ignored.
3.6 Design for Manufacturing (DfM) Notes
The mechanical drawings include critical application notes:
- FPC Bending: Clearance requirements for FPC bending radius.
- EMI Shielding: Use of double-sided EMI shielding film.
- Bezel Design: The housing viewing window should be 0.3mm smaller per side than the module's active area (VA). The housing foam cutout should be 0.6mm larger per side than the VA.
- TP Warning: The touch panel (if used separately) edge must not contact metal conductors.
- Compliance: ROHS.
4. Application Guidelines & Critical Notes
- Intended Use: High-end smartwatches, wearable medical devices, industrial handheld terminals with square UIs, portable instrumentation, and any application requiring a compact, high-brightness, wide-viewing-angle square display.
- Critical Design Considerations:
- Reset Sequence is Paramount: The firmware power-on/reset routine must implement the 10µs low pulse and the mandatory 15ms/120ms wait times as specified. Failure is a common cause of initialization failure.
- Power Supply Sequencing: Although not as complex as some drivers, ensuring VSP/VSN/IOVCC are stable before releasing reset is important.
- MIPI Configuration: The host DSI transmitter must be configured for the appropriate number of lanes (likely 4), pixel format (e.g., RGB888), and must comply with the provided HS/LP timing parameters.
- Mechanical Integration: Pay close attention to the bezel and foam cutout guidelines to avoid mechanical stress on the panel and ensure proper light sealing.
- High Brightness Backlight: The 500-nit backlight may require a more capable LED driver circuit. Ensure proper heat dissipation in the final assembly.
- Handling: Standard ESD precautions. Notes on the drawing indicate "yellow insulating tape" and "tear-off tab" areas for handling.
5. Conclusion & Design-In Support
The LS0395I13L-MP-V2 specification is a masterclass in detailed technical documentation. For successful integration, engineers must treat this document as the single source of truth. The reset timing requirements and wait periods are non-negotiable and should be hard-coded into the system's boot sequence. Simultaneously, the mechanical DfM notes must guide enclosure design to prevent physical damage. By meticulously following the electrical characteristics, MIPI timing tables, optical parameters, and mechanical guidelines, designers can fully leverage this high-quality square IPS module to create products with outstanding visual performance and reliability.
