LSCI070001XGA-RV1.0 - 7.0 inch 1024×600 Module CTP

1. General Description
The LSCI070001XGA-RV1.0 is a transmissive type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display) module, which is composed of a TFT-LCD panel, a driver circuit, and a backlight unit. The module has a 7.0-inch diagonal active area with a resolution of 1024(RGB)×600 pixels and supports 24-bit RGB input data.

2. Physical Features

• Display Mode: Active matrix TFT, Transmissive type
• Display Format: Graphic 1024(RGB)×600 Dot-matrix
• Input Data: 24 bit RGB
• Viewing Direction (Grayscale Inversion): IPS
• Module Type: COG+FPC+B/L+CTP

3. Mechanical Specification

• Module size (H×V×D): 164.9 × 100 × 4.85 mm
• Number of dots: 1024(RGB) × 600 pixels
• Active area (H×V): 154.08 × 85.92 mm

4. Absolute Maximum Ratings

• Digital Supply Voltage (VDD, VDD-LVDS): -0.3 to 5 V
• Analog Supply Voltage (AVDD): -0.5 to 15 V
• Gate On Voltage (VGH): -0.3 to 40 V
• Gate Off Voltage (VGL): -20 to 0.3 V
• Gate On-Gate Off Voltage (VGH-VGL): -0.3 to 40 V

5. Electrical Characteristics

• Digital Power Supply Voltage (VDD): 3.0 to 3.6 V (Typ. 3.3 V)
• Analog Power Supply Voltage (AVDD): 8.5 to 8.9 V (Typ. 8.7 V)
• TFT Gate on voltage (VGH): 22 to 24 V (Typ. 23 V)
• TFT Gate off voltage (VGL): -7.4 to -6.2 V (Typ. -6.8 V)
• Common Voltage (VCOM): 2.2 to 2.6 V (Typ. 2.4 V)

Backlight Characteristics

• Forward voltage (Vf): 9.0 to 10.5 V (Typ. 9.6 V, If=120mA)
• Luminance (Lv): 380 cd/m² typ to 450 cd/m² max
• Number of LED: 18 pieces
• Connection mode: 3 chips serial × 6

6. Module Function Description
Block Diagram: The module includes a TFT-LCD panel, Source Driver, Gate Driver, and Backlight.
Key Pin Descriptions:

• Pin 1,2 (VLED+): Power for LED backlight (Anode)
• Pin 3,4 (VLED-): Power for LED backlight (Cathode)
• Pin 7 (DVDD): Digital Power
• Pin 8 (MODE): DE/SYNC mode select. Normally pull high (H: DE mode, L: HSD/VSD mode)
• Pin 9 (DE): Data Enable signal
• Pin 10 (VSD): Vertical sync input, Negative polarity
• Pin 11 (HSD): Horizontal sync input, Negative polarity
• Pin 12-19 (B7-B0): Blue Data
• Pin 20-27 (G7-G0): Green Data
• Pin 28-35 (R7-R0): Red Data
• Pin 37 (DCLK): Clock signal
• Pin 39 (SHLR): Left or Right Display Control
• Pin 40 (UPDN): Up/ Down Display Control
• Pin 41 (VDDG): Positive Power for TFT
• Pin 42 (VEEG): Negative Power for TFT
• Pin 43 (AVDD): Analog Power
• Pin 44 (RSTB): Global reset pin, Active low to enter reset state. Suggest to connecting with an RC reset circuit for stability (R=10KΩ, C=1μF). Normally pull high.
• Pin 47 (DITH): Dithering setting (H: 8bit, L: 6bit resolution)

CTP Pinout:

• 1: RST, 2: VDD, 3: GND, 4: INT, 5: SDA, 6: SCL

7. Timing Characteristic
DE Mode:

• Dot Clock (1/tCLK): 45 to 57 MHz (Typ. 51.2 MHz)
• Horizontal Total Time (tH): 1324 to 1364 tCLK (Typ. 1344)
• Horizontal Effective Time (tHA): 1024 tCLK
• Horizontal Blank Time (tHB): 300 to 340 tCLK (Typ. 320)
• Vertical Total Time (tV): 625 to 645 tH (Typ. 635)
• Vertical Effective Time (tVA): 600 tH
• Vertical Blank Time (tVB): 25 to 45 tH (Typ. 35)

SYNC Mode:

• Horizontal Total Time (TH): 1324 to 1364 tCLK (Typ. 1344)
• Horizontal Front Porch (Thfp): 140 to 180 tCLK (Typ. 160)
• Vertical Total Time (TV): 625 to 645 tH (Typ. 635)
• Vertical Front Porch (Tvfp): 2 to 22 tH (Typ. 12)

Power on/off sequence:

• Power On: DVDD → AVDD/VGL → VGH → Video & Logic Signal → Backlight
• Power Off: Backlight → Video & Logic Signal → VGH → AVDD/VGL → DVDD

8. Electro-Optical Characteristics

• Luminance: 380 cd/m² min, 450 cd/m² typ
• Luminance Uniformity: 75% min, 80% typ (9 points)
• Contrast Ratio: 200 typ
• Response Time (Tr+Tf): 25 ms typ
• Viewing Angle (CR>10, Horizontal): 70° typ (Left and Right)
• Viewing Angle (CR>10, Vertical): 40° typ (Upper), 60° typ (Lower)
• White Chromaticity (X, Y): X=0.313±0.04, Y=0.329±0.04

9. Records Of Version

• Revision: 1.0