LS018I02-QS-V1: 1.8-Inch IPS TFT LCD Module, 360×360 Resolution, 262K Colors, QSPI Interface

Product Subtitle / Keywords:
1.8 Inch Display, 360(RGB)×360 Resolution, Transmissive a-Si TFT IPS, QSPI Interface, COG+FPC+B/L, 262K Colors, ST77916 Driver, 48.08×49.95×1.96 mm, 300 cd/m² Brightness, 1200:1 Contrast Ratio, 25ms Response Time, Free (IPS) Viewing Direction, -20°C~70°C Operating Temperature


1. Executive Summary & Product Positioning

The LS018I02-QS-V1, developed by Lixin (Wan'an) Intelligent Display Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 1.8-inch transmissive amorphous Silicon TFT-LCD (a-Si TFT-LCD) module with IPS (In-Plane Switching) technology.

 

This product specification (Revision 1.0, Module Type: COG+FPC+B/L) serves as the definitive technical document, defining its structural composition (COG+FPC+B/L), physical features, mechanical dimensions, absolute maximum ratings, detailed electrical characteristics, complete QSPI (Quad Serial Peripheral Interface) pinout and timing, and comprehensive electro-optical performance. It delivers a high-resolution square display of 360(RGB)×360 with 262K-color display capability, driven by the ST77916 controller.

The document provides the core parameters necessary for system integration into high-performance embedded display applications. The unequivocal recommendation for engineers is to strictly adhere to the electrical specifications, interface timing, and mechanical tolerances described hereinances described herein** to ensure reliable performance and compatibility.


2. Detailed Product Overview & Architecture

  • Core Technology: Transmissive-type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display).
  • Display Mode: Transmissive-type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display).
  • Display Mode: Active matrix TFT, Transmissive type.
  • Display Format: Graphic 360(RGB)×360 Dot-matrix.
  • Display Characteristics: Capable of displaying up to 262 thousand colors.
  • Module Construction: COG (Chip-On-Glass) + FPC (Flexible Printed Circuit) + B/L (Backlight Unit). Composed of a TFT-LCD panel, a driver circuit, and a backlight unit.
  • Input Data: QSPI (Quad Serial Peripheral Interface).
  • Viewing Direction (Grayscale Inversion): Free (IPS) – wide viewing angle in all directions.
  • Drive IC: ST77916.
  • Approval Status: ☑ Approved Product Specification only (as per signature block).

3. Exhaustive Technical Specifications

3.1 Mechanical & Physical Specifications

表格
 
 
Item Specification Unit
Module size (H×V×D) 48.08 × 49.95 × 1.96 mm
Active area (H×V) 45.684 × 45.684 mm
Number of dots / Resolution 360(RGB) × 360 pixel
Panel Size (Diagonal) 1.8 inch

Critical Mechanical Design Notes (from outline dimension drawing):

  1. Display Type: TFT, Normally Black, Transmissive.
  2. Viewing Angle: ALL O'CLOCK (IPS).
  3. Module Luminance (WITHOUT CTP): 300 cd/m² (typ).
  4. Operating Temperature: -20°C ~ +60°C.
  5. Storage Temperature: -30°C ~ +70°C.
  6. Backlight: 3 chip White LED, in Parallel. Vf: 3.2V, If: 60mA.
  7. General Tolerance: ±0.20 mm.
  8. Angular Tolerance: ∠ ±1/4°.
  9. ROHS Compliance: Yes.
  10. Dimensions with mark "*" are important, with mark "()" are referenced.
  11. FPC Pitch: 0.5mm * 9 = 4.50 ± 0.05mm.
  12. FPC Bend: The FPC is shipped in a specific bent configuration (FPC弯折示意图).
  13. Backlight Circuit: IF=60mA, Vf=6V (Typ).
  14. Pin 1 Mark: Indicated on the drawing.
  15. Unit: mm.

3.2 Electrical & Interface Specifications

3.2.1 Absolute Maximum Ratings

Item Symbol Min Max Unit Remark
Supply voltage VCC -0.3 4.6 V Note1 Note2
Supply voltage IOVCC -0.3 4.0 V Note1 Note2
Operating temperature TOPR -20 70 °C Note1 Note2
Storage temperature TSTR -30 80 °C Note1 Note2

Notes (interpreted):

  • Note1/Note2: Stress beyond these ratings may cause permanent damage; functional operation is not implied under these conditions.

3.2.2 Electrical Characteristics (DC – Recommended Operating Conditions)

表格
 
 
Item Item Symbol Min Typ Max Unit
Supply voltage Supply voltage VCC 2.65 2.8 3.3 V
Supply voltage Supply voltage IOVCC 1.65 1.8 3.3 V
Input Voltage (L level) L level VIL 0 0.3*IOVCC V
Input Voltage (H level) H level VIH 0.7*IOVCC IOVCC V

3.2.3 Pin Description (16-pin FPC)

表格
 
 
PIN NO. Symbol I/O Description
1 TP_VCC P Power supply for Touch Panel
2 TP_RST I Reset Pin for TP
3 TP_INT O Interrupt signal for TP
4 TP_SCL I SCL pin for TP (I²C clock)
5 TP_SDA I/O SDA pin for TP (I²C data)
SDA pin for TP (I²C data)      
6 CS I Chip select pin
7 QSPI_CLK I Clock in SPI interface. (SCL)
8 QSPI_IO0 I/O QSPI interface data bus
9 QSPI_IO1 I/O QSPI interface data bus
10 QSPI_IO2 I/O QSPI interface data bus
11 QSPI_IO3 I/O QSPI interface data bus
12 RST I This signal will reset the device and it must be applied to properly initialize the chip
13 VCC P Power supply
14 LEDK P Power for LED backlight cathode
15 LEDA P Power for LED backlight anode
16 GND P Ground

Interface Summary:

  • QSPI Interface: Pins 8, 9, 10, 11 (QSPI_IO0, QSPI_IO1, QSPI_IO2, QSPI_IO3) form a Quad SPI (QSPI) bus — a high-speed 4-bit serial interface allowing data transfer 4x faster than standard SPI.
  • Control Pins: CS (Chip Select, Pin 6), QSPI_CLK (Serial Clock, Pin 7), RST (Reset, Pin 12).
  • Power Pins: VCC (Pin 13) for main logic, GND (Pin 16) for ground.
  • Backlight: Dedicated LEDA (Anode, Pin 15) and LEDK (Cathode, Pin 14) pins.
  • Touch Panel Interface: Pins 1-5 provide a dedicated interface for an external capacitive touch panel (TP_VCC, TP_RST, TP_INT, TP_SCL, TP_SDA).

3.2.4 QSPI Interface Timing Characteristics

Conditions: VDDI=1.65 to 3.3V, VDD=2.65 to 3.3V, GND=RGND=0V, Ta=25°C.

A. Write Operation Timing:

表格
 
 
Signal Symbol Parameter Min Max Unit Description
CSX
TCST_{CS}TCS
Chip select setup time (write) 15 ns  
CSX
TCSHT_{CSH}TCSH
Chip select hold time (write) 15 ns  
CSX
TCHWT_{CHW}TCHW
Chip select "H" pulse width 40 ns  
SCL
TSCYCWT_{SCYCW}TSCYCW
Serial clock cycle (Write) 16 ns  
SCL
TSHWT_{SHW}TSHW
SCL "H" pulse width (Write) 7 ns  
SCL
TSLWT_{SLW}TSLW
SCL "L" pulse width (Write) 7 ns  
SDA (DIN)
TSDST_{SDS}TSDS
Data setup time 7 ns  
SDA (DIN)
TSDHT_{SDH}TSDH
Data hold time 7 ns  

B. Read Operation Timing:

表格
 
 
Signal Symbol Parameter Min Max Unit Description
CSX
TCSST_{CSS}TCSS
Chip select setup time (read) 60 ns  
Chip select setup time (read) 60 ns      
CSX
TSCCT_{SCC}TSCC
Chip select hold time (read) 65 ns  
CSX
TCHWT_{CHW}TCHW
Chip select "H" pulse width 200 ns Note1
SCL
TSCYCRT_{SCYCR}TSCYCR
Serial clock cycle (Read) 150 ns  
SCL
TSHRT_{SHR}TSHR
SCL "H" pulse width (Read) 60 ns  
SCL
TSLRT_{SLR}TSLR
SCL "L" pulse width (Read) 60 ns  
SDA (DIN)
TSDST_{SDS}TSDS
Data setup time 7 ns  
SDA (DIN)
TSDHT_{SDH}TSDH
Data hold time 7 ns  
DOUT
TACCT_{ACC}TACC
Access time 10 50 ns For maximum CL=30pF
DOUT
TOHT_{OH}TOH
Output disable time 15 50 ns For maximum CL=30pF

Key Timing Observations:

  • Write timing is significantly faster than read timing: Write clock cycle (TSCYCW) is 16ns (62.5 MHz), while read clock cycle (TSCYCR) is 150ns (6.67 MHz).
  • Data setup/hold time: TSDS = TSDH = 7ns – very fast, requiring careful PCB layout.
  • Chip select hold time (read): TCHW = 200ns minimum (Note 1), which is significantly longer than the write hold time (40ns).

3.2.5 Backlight Unit

表格
 
 
Item Specification Unit
LED Circuit 3 chip White LED, in Parallel
Drive Condition IF = 60mA, Vf = 6V (Typ)

Backlight Circuit Diagram (from document):

 
 
LEDA → [Backlight Circuit] → LEDK
IF = 60mA
VF = 6V (Typ)

3.3 Optical & Electro-Optical Characteristics (Ta=25°C)

表格
 
 
Item Item Symbol Condition Min. Typ. Max. Unit Remark
Response time Response time Tr + Tf **θx = θy = 0 25 35 ms Note 1
Contrast Ratio Contrast Ratio CR θx = θy = 0 800 1200 Note 2
Transmittance Transmittance T% θx = θy = 0 3.4 4.0 %  
Color Chromaticity (CIE1931) White W x θx = θy = 0 0.297  
Color Chromaticity (CIE1931) White W y θx = θy = 0 0.337  
Viewing angle θT   CR > 10 80 85 Deg. Note 3
Viewing angle θB   CR > 10 80 85 Deg. Note 3
Viewing angle θL   CR > 10 80 85 Deg. Note 3
Viewing angle θR   CR > 10 80 85 Deg. Note 3

Notes (from document):

Note 1: Definition of Response Time
The response time is defined as the following figure and shall be measured by switching the input signal for "black" and "white". This definition is valid for a normally black display. For a normally white display the opposite definition applies.
The response time definition diagram shows:

  • Optical Response (%): Black = 0%, White = 100%
  • Tr (Rise Time): Time from 10% to 90% of optical response.
  • Tf (Fall Time): Time from 90% to 10% of optical response.
  • Tr + Tf = Total Response Time.

Note 2: Definition of Contrast Ratio
Contrast ratio (CR) is defined mathematically by the following formula:
Contrast Ratio = Luminance measured when LCD on the "White" state / Luminance measured when LCD on the "Black" state

Note 3: Definition of Viewing Angle
Viewing angle is the angle at which the contrast ratio is greater than 10. Angles are determined for the horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to the LCD surface.
The viewing angle definition diagram shows:

  • θ = 0° (z-axis, normal to LCD surface)
  • Φ = 0° (3 o'clock direction, Right)
  • Φ = 90° (12 o'clock direction, Top/Up)
  • Φ = 180° (9 o'clock direction, Left)
  • Φ = 270° (6 o'clock direction, Bottom/Down)

Note 4: Backlight Circuit

  • Circuit diagram: LEDA → [Backlight] → LEDK
  • Drive condition: IF = 60mA, Vf = 6V (Typ)

3.4 Version Record

(Not explicitly provided in the extracted document excerpt; refer to Section 9 of the full specification.)


4. Application Guidelines & Critical Notes

Intended Use

  • Smartwatches, fitness trackers, and other wearable devices
  • IoT display nodes and smart home controls
  • Miniature handheld instruments
  • Any application requiring a compact, high-resolution square display with excellent IPS viewing angles

Critical Design Considerations

  1. QSPI Interface – High-Speed Design:

    • This module uses a QSPI (Quad SPI) interface with 4 data lines (QSPI_IO0, QSPI_IO1, QSPI_IO2, QSPI_IO3) for simultaneous data transfer, providing 4x the throughput of standard SPI.
    • The host MCU must have a QSPI peripheral or be able to emulate QSPI with sufficient speed.
    • PCB Layout: Keep the 4 QSPI data lines and clock (QSPI_CLK) as short as possible and equal in length to minimize skew.
    • Use a series resistor (10-22Ω) on each QSPI line near the host MCU to reduce signal reflections.
    • A separate CS (Chip Select) line is used for chip selection.
  2. Power Supply:

    • Provide stable VCC (2.65V to 3.3V, 2.8V typical) for the main logic (connected to Pin 13).
    • Provide stable IOVCC (1.65V to 3.3V, 1.8V typical) for the I/O interface.
    • The backlight requires a constant-current LED driver connected to LEDA (Anode, Pin 15) and LEDK (Cathode, Pin 14), set to 60 mA at approximately 6V (Typ).
  3. Touch Panel Interface:

    • The module includes a dedicated TP interface (Pins 1-5) for an external capacitive touch panel.
    • The TP interface uses: TP_SCL (I²C clock), TP_SDA (I²C data), TP_RST (Reset), TP_INT (Interrupt), and TP_VCC (Power).
    • Ensure the touch panel controller is properly initialized via its I²C interface.
  4. Reset Circuit:

    • The RST pin (Pin 12) is active low.
    • It must be driven low for at least 10 μs during power-up for proper initialization.
    • After releasing RESET, wait 5 ms before sending any commands.
    • A simple RC circuit (10kΩ resistor to VCC, 1μF capacitor to GND) or an MCU GPIO is recommended.
  5. Interface Timing Requirements:

    • For write operations, the serial clock cycle (TSCYCW) must be ≥ 16ns (62.5 MHz maximum). This is a very fast write speed requiring careful PCB layout.
    • For read operations, the serial clock cycle (TSCYCR) must be ≥ 150ns (6.67 MHz maximum).
    • Data setup time (TSDS) and data hold time (TSDH) must be ≥ 7ns.
    • Chip select setup time (TCS): 15ns for write, 60ns for read.
    • Chip select "H" pulse width (TCHW): 40ns for write, 200ns for read (Note 1).
  6. Mechanical Integration:

    • Module Outline: 48.08mm (H) × 49.95mm (V) × 1.96mm (D).
    • Active Area: 45.684mm × 45.684mm – a perfectly square display.
    • FPC: The module uses a 16-pin FPC with 0.5mm pitch (9 pins × 0.5mm = 4.50mm total width).
    • FPC Bend: The FPC has a designated bend area — follow the intended bend direction for installation.
  7. Viewing Angle Characteristics:
    This is an IPS panel with excellent viewing angle performance (CR > 10):

    • Top (12 o'clock): 85° (Typ)
    • Bottom (6 o'clock): 85° (Typ)
    • Left (9 o'clock): 85° (Typ)
    • Right (3 o'clock): 85° (Typ)

    The module provides near-perfect viewing angles in all directions, making it ideal for wearable devices where the display is viewed from various angles.

  8. Optical Performance:

    • Response Time: 25ms (Typ), 35ms (Max) – fast enough for most GUI applications.
    • Contrast Ratio: 800 (Min), 1200 (Typ) – excellent contrast performance for an IPS panel.
    • Transmittance: 3.4% (Min), 4.0% (Typ).
    • White Chromaticity (CIE1931): Wx = 0.297, Wy = 0.337 (Typical).
    • Module Luminance (WITHOUT CTP): 300 cd/m² (typ).
  9. Temperature Limits:

    • Operating Temperature: -20°C to +60°C.
    • Storage Temperature: -30°C to +70°C.

Handling & Compliance

  • The module is ROHS compliant.
  • Observe standard ESD precautions during handling and assembly.
  • The module contains fragile glass and a 16-pin FPC – handle with care.
  • Avoid bending the FPC sharply, especially near the connector interface.
  • The module includes a high-temperature insulation tape (高温绝缘胶带) for handling during assembly.

5. Conclusion & Design-In Support

The LS018I02-QS-V1 specification details a high-performance 1.8-inch square IPS display module with a high-speed QSPI interface — an excellent choice for wearable and compact display applications requiring high resolution, excellent image quality, and fast data transfer.

Key Strengths:

  1. High-Resolution Square Display: The 360×360 resolution in a 1.8-inch square format is ideal for round or circular watch faces (with a circular mask) or symmetrical UI designs.

  2. Excellent IPS Technology: 85° viewing angles in all directions ensure consistent image quality from any perspective — essential for wearable devices.

  3. High-Speed QSPI Interface: The 4-bit parallel data transfer with a 16ns write cycle (62.5 MHz) provides excellent throughput for smooth animations and fast screen updates.

  4. Excellent Contrast Ratio: 1200:1 (Typ) provides outstanding image quality for an IPS panel.

  5. Integrated Touch Panel Interface: The dedicated TP interface (Pins 1-5) simplifies integration with external capacitive touch panels.

  6. Fast Response Time: 25ms (Typ) – suitable for most GUI applications.

  7. High Brightness: 300 cd/m² (typ) ensures good readability in indoor and outdoor conditions.

Main Design Focus:

  • The critical design task is properly implementing the high-speed QSPI interface with careful PCB layout (length-matched data lines, series termination resistors).
  • Supporting requirements:
    • Provide stable VCC (2.8V typical) and IOVCC (1.8V typical) power.
    • Provide a constant-current backlight driver set to 60 mA at 6V (Typ).
    • Mechanical integration — the module outline is 48.08mm × 49.95mm × 1.96mm.
    • FPC connector — verify the 16-pin FPC with 0.5mm pitch.
    • Touch panel integration — connect and initialize the external touch panel via the dedicated TP interface.
    • Reset timing — ensure proper reset pulse width (≥10μs) and wait times.

This module is an excellent choice for high-end wearable devices, smartwatches, and any compact IoT application requiring a high-resolution square IPS display with a modern high-speed QSPI interface, excellent contrast ratio, and integrated touch panel support.