LSL018I01-QS-V1 | 1.8 inch TFT-LCD | 360x360 | QSPI | IPS | COG+FPC+B/L+LENS
1. Executive Summary & Product Positioning
The LSL018I01-QS-V1 is a 1.8-inch transmissive type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display) module developed by 立信(万安)智显科技有限公司 (Lesson Smart Display Technology Co., Ltd). It is composed of a TFT-LCD panel, a driver circuit, and a backlight unit. The panel size is 1.8 inch and the resolution is 360(RGB)*360, the panel can display up to 262k colors.
Product Positioning: Designed for a wide range of compact, square-shaped display applications requiring a high-resolution, fast QSPI interface and exceptional image quality. With its IPS (Free) viewing direction, high contrast ratio (1200 Typ), integrated LENS for full lamination and 360(RGB)*360 resolution, it is ideally suited for smart wearables, smart home controls, medical equipment, and other high-end portable devices.
2. Detailed Product Overview & Architecture
The module's architecture is designed for high performance and robust integration. The primary components include:
- TFT-LCD Panel: 1.8-inch diagonal, a-Si TFT active matrix, transmissive, IPS display mode. The resolution is 360(RGB) × 360 pixels with an active area of 45.684 (H) × 45.684 (V) mm.
- Driver IC: The module uses the ST77916 driver IC.
- Backlight Unit (B/L): A white LED edge-lit backlight unit. The driving condition is If=60mA with a forward voltage (Vf) of 2.8V to 3.3V for the single LED configuration.
- Mechanical Construction: COG (Chip-on-Glass) + FPC + Backlight + LENS (Cover Lens). The module outline dimensions are 69.0 (H) × 69.0 (V) × 3.11 (D) mm. The module includes a LENS for a "fully laminated, one-dark effect" appearance.
- Interface: The module communicates via a 10-pin FPC connector. The main display interface is QSPI (Quad SPI).
3. Exhaustive Technical Specifications
3.1 General & Mechanical Specifications
| Item | Specification |
| Display Size (Diagonal) | 1.8 inches |
| Resolution (Dots) | 360(RGB) × 360 |
| Display Technology | Active matrix TFT, Transmissive, a-Si |
| Display Format | Graphic 360(RGB)×360 Dot-matrix |
| Module Construction | COG+FPC+B/L+LENS |
| Color Depth | 262K Colors |
| Viewing Direction (Grayscale Inversion) | Free (IPS) |
| Input Data Interface | QSPI |
| Driver IC | ST77916 |
| Number of Dots | 360(RGB) × 360 pixels |
| Active Area (H×V) | 45.684 × 45.684 mm |
| Module Size (H×V×D) | 69.0 × 69.0 × 3.11 mm |
| Operating Temperature | -20°C to +70°C |
| Storage Temperature | -30°C to +80°C |
3.2 Electrical Specifications
3.2.1 Absolute Maximum Ratings
| Parameter | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| Supply Voltage (Logic) | VCC | -0.3 | 4.6 | V |
| Supply Voltage (IO) | IOVCC | -0.3 | 4.0 | V |
| Operating Temperature | TOPR | -20 | 70 | °C |
| Storage Temperature | TSTR | -30 | 80 | °C |
3.2.2 DC Characteristics (Ta=25°C)
| Parameter | Symbol | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Supply Voltage (Logic) | VCC | 2.65 | 2.8 | 3.3 | V |
| Supply Voltage (IO) | IOVCC | 1.65 | 1.8 | 3.3 | V |
| Input Voltage (Low Level) | VIL | 0 | -- | 0.3*IOVCC | V |
| Input Voltage (High Level) | VIH | 0.7*IOVCC | -- | IOVCC | V |
3.2.3 Backlight LED Characteristics
The backlight uses a White LED. The driving condition is If=60mA, Vf=2.8V~3.3V.
3.3 Interface & Pin Map (10-Pin Connector)
The module uses a 10-pin FPC connector with a pitch of 0.5mm. The pinout integrates the QSPI interface, power supply, and backlight signals.
| Pin No. | Symbol | I/O | Description |
|---|---|---|---|
| 1 | GND | P | Ground |
| 2 | LEDK | P | Power for LED backlight cathode |
| 3 | LEDA/VCC3.3V | P | Power for LED backlight anode / power supply (shared) |
| 4 | CS | I | Chip select pin (Low active) |
| 5 | QSPI_SCK | I | Clock in SPI interface (SCL) |
| 6 | QSPI_IO0 | I | QSPI interface data bus (bit 0) |
| 7 | QSPI_IO1 | I | QSPI interface data bus (bit 1) |
| 8 | QSPI_IO2 | I | QSPI interface data bus (bit 2) |
| 9 | QSPI_IO3 | I | QSPI interface data bus (bit 3) |
| 10 | RST | I | Reset signal (Low active, needed for proper initialization) |
3.4 Optical Specifications
Optical characteristics are measured at θx = θy = 0°, Ta=25°C.
| Item | Symbol | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Response Time (Tr+Tf) | Tr+Tf | - | 25 | 35 | ms |
| Contrast Ratio | CR | 800 | 1200 | - | - |
| Transmittance | T% | 3.4 | 4.0 | - | % |
| Color Chromaticity (White) - CIE1931 | Wx, Wy | - | 0.297, 0.337 | - | - |
| Viewing Angle (CR > 10) | θT, θB, θL, θR | 80 (All) | 85 (All) | - | Deg. |
3.5 Interface Timing Characteristics (QSPI)
The module supports QSPI interface timing with the following key parameters (Test Condition: VDDI=1.65 to 3.3V, VDD=2.65 to 3.3V, GND=RGND=0V, Ta=25°C):
3.5.1 QSPI Write Cycle Timing
| Parameter | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| Serial Clock Cycle (Write) | T SCYCW | 16 | - | ns |
| SCL H pulse width (Write) | T SHW | 7 | - | ns |
| SCL L pulse width (Write) | T SLW | 7 | - | ns |
| Data Setup Time | T SDS | 7 | - | ns |
| Data Hold Time | T SDH | 7 | - | ns |
| Chip Select Setup Time (Write) | T CS | 15 | - | ns |
| Chip Select Hold Time (Write) | T CSH | 15 | - | ns |
| Chip Select H pulse width | T CHW (Note1) | 200 | - | ns |
3.5.2 QSPI Read Cycle Timing
| Parameter | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| Serial Clock Cycle (Read) | T SCYCR | 150 | - | ns |
| Access Time | T ACC | 10 | 50 | ns |
| Output Disable Time | T OH | 15 | 50 | ns |
| Chip Select Setup Time (Read) | T CSS | 60 | - | ns |
| Chip Select Hold Time (Read) | T SCC | 65 | - | ns |
Note: The rising time and falling time (Tr, Tf) of input signal are specified at 15 ns or less. Logic high and low levels are specified as 30% and 70% of VDDI for Input signals.
4. Application Guidelines & Critical Notes
When integrating the LSL018I01-QS-V1 module, engineers must adhere to the specific guidelines outlined in the specification to ensure optimal performance and reliability.
- Power Supply (Dual Rail): The module requires two supply rails: VCC (2.65V to 3.3V, Typ 2.8V) for the LCD logic and IOVCC (1.65V to 3.3V, Typ 1.8V) for the I/O interface. The I/O voltage level must match the host's logic level.
- Pin 3 Shared Function: Pin 3 is designated as "LEDA/VCC3.3V". This pin functions as the Power for LED backlight anode, but it is also noted as a power supply pin. Care must be taken to ensure the correct voltage is applied here.
- QSPI Interface: This is a fast Quad SPI interface. The host processor must support QSPI protocol. The data lines (QSPI_IO0-3) are bi-directional. The host should be configured for Quad mode to achieve the maximum data transfer rate.
- Reset Timing: The reset pin (RST) must be pulled low for a proper initialization sequence after power-up, as per the ST77916 driver IC requirements.
- Mechanical Integration: The module includes a LENS (cover glass) for a fully laminated, one-dark effect. The module outline dimensions are 69.0 × 69.0 × 3.11 mm. The active area is 45.684 × 45.684 mm. The FPC is designed for bending (FPC bending diagram is provided in the specification).
- Handling Precautions: The module uses a glass LCD panel and LENS. Handle with care to avoid breakage. The surface of the polarizer and LENS must be protected from scratches.
- RoHS Compliance: This module is designed to comply with RoHS directives.
5. Conclusion & Design-In Support
The LSL018I01-QS-V1 from Lesson Smart Display Technology is a feature-rich, high-resolution 1.8-inch TFT-LCD module. Its combination of a square format, fast QSPI interface, wide viewing angle (IPS), exceptional contrast ratio (1200 Typ), integrated LENS for a premium look, and wide temperature range makes it an excellent choice for a wide variety of demanding applications.
For design-in support, it is strongly recommended to:
- Obtain and review the full Product Specification (Revision 1.0) for the complete set of electrical parameters, interface timing diagrams, mechanical drawings (including the outline dimension drawing), and the ST77916 driver IC datasheet.
- Design the power supply to provide both VCC and IOVCC rails, ensuring proper power sequencing. Carefully manage the shared LEDA/VCC function on pin 3.
- Develop firmware using the standard QSPI protocol for the ST77916 driver IC. Pay careful attention to the read and write timing parameters.
- Contact the manufacturer for evaluation kits, sample requests, and technical support during the design-in phase.
This module is engineered to deliver reliable, vibrant, and premium-quality display performance for modern electronic products.
