Product Main Title:
LS19I03-SM-V1: 1.9-Inch IPS TFT LCD Module, 170x320 Resolution, 262K Colors, SPI/8080 Selectable Interface, ST7789T3 Driver
Product Subtitle / Keywords:
1.9 Inch Display, 170x320 Resolution, Transmissive a-Si IPS TFT, SPI / 8080 Parallel Interface, COG+FPC+B/L, 262K Colors, Selectable Interface, Detailed Timing for Both Modes
Comprehensive Technical Specification & Application Guide
1. Executive Summary & Product Positioning
The LS19I03-SM-V1, developed by LESSON (Wan'an) Zhixian Technology Co., Ltd., is a compact 1.9-inch transmissive amorphous Silicon TFT-LCD module with an IPS panel. A key feature of this module is its selectable interface, configurable as either a 4-line SPI (serial) or an 8-bit 8080 parallel interface via a control pin (IM1/2). This product specification book provides the definitive technical definition, covering its structural composition, mechanical dimensions, absolute maximum ratings, detailed electrical characteristics, and comprehensive timing specifications for both SPI and 8080 interface modes. It delivers a resolution of 170(RGB)×320 with 262K-color capability, driven by the ST7789T3 controller. This flexibility makes it suitable for a wide range of host microcontrollers. Engineers must carefully configure the IM1/2 pin and adhere to the timing specifications for the chosen interface mode during system design.
2. Detailed Product Overview & Architecture
- Core Technology: Transmissive-type a-Si TFT-LCD with IPS technology.
- Display Characteristics: Capable of displaying up to 262K colors.
- Module Construction: Composed of a TFT-LCD panel, a driver circuit (ST7789T3), and a backlight unit.
- Interface: User-selectable between 4-line Serial (SPI) and 80-series 8-bit parallel (8080) interface.
- Driver IC: ST7789T3.
- Viewing Direction: IPS.
3. Exhaustive Technical Specifications
3.1 Mechanical & Physical Specifications
- Panel Size (Diagonal): 1.9 inches
- Active Area (H×V): 22.7 mm × 42.72 mm
- Module Size (H×V×D): 25.8 mm × 49.73 mm × 1.47 mm
- Resolution: 170 (RGB) × 320 pixels
- Display Format: Graphic 170(RGB)×320 Dot-matrix
3.2 Electrical & Interface Specifications
3.2.1 Absolute Maximum Ratings
| Item | Symbol | Min | Max | Unit | Remark |
|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 4.6 | V | Note1,2 |
| I/O Supply voltage | IOVCC | -0.3 | 4.6 | V | Note1,2 |
| Operating temperature | TOPR | -20 | 70 | °C | Note1,2 |
| Storage temperature | TSTR | -30 | 80 | °C | Note1,2 |
3.2.2 Electrical Characteristics (DC, Ta=25°C)
| Item | Symbol | Min | Typ | Max | Unit |
|---|---|---|---|---|---|
| Supply voltage (Main) | VCC | 2.4 | 2.8 | 3.3 | V |
| I/O Supply voltage | IOVCC | 1.65 | 1.8 | 3.3 | V |
| Input Voltage (L) | VIL | 0 | -- | 0.3*IOVCC | V |
| Input Voltage (H) | VIH | 0.7*IOVCC | -- | IOVCC | V |
3.2.3 Pin Description (21-pin FPC) & Interface Selection
| PIN NO. | Symbol | I/O | Description (Multi-function noted) |
|---|---|---|---|
| 1 | RESET | I | Reset signal. |
| 2 | RS | I | Parallel: D/CX (Data/Command). Serial: Serial clock (SCL). |
| 3 | WR | I | Parallel: Write enable. 4-line Serial: D/CX. 2-lane Serial: Data lane 2. |
| 4 | RD | I | Parallel: Read enable. |
| 5 | CS | I | Chip selection pin. |
| 6 | VCC | P | Main power supply (2.4-3.3V). |
| 7 | IOVCC | P | I/O logic power supply (1.65-3.3V). |
| 8 | IM1/2 | I | Interface Mode Select. '1': 4-line 8-bit serial I/F. '0': 80-series 8-bit parallel I/F. |
| 9 | SPI_SDA | I/O | SPI interface data pin (used in serial mode). |
| 10 | GND | P | Ground. |
| 11, 12 | LEDA | P | Power for LED backlight anode. |
| 13-20 | D7-D0 | I | 8-bit data bus (used in parallel mode). |
| 21 | TP_VCC | P | NC (No Connection). |
Interface Selection Key: The state of pin 8 (IM1/2) at power-up/reset determines the active interface, changing the function of pins like RS(2), WR(3), and RD(4).
3.2.4 Critical Interface Timing
The document provides exhaustive timing tables for both interface modes under VDDI=1.65-3.3V, VDD=2.4-3.3V, Ta=25°C.
A. 8080 Parallel Interface Timing:
Includes parameters for Address setup/hold (T_AST, T_AHT), Chip Select timing (T_CS, T_RCS, T_RCSFM, T_CSH, etc.), Write cycle (T_WC, T_WRH, T_WRL), Read cycle for ID and Frame Memory (T_RC, T_RCFM, T_RDH, T_RDL, etc.), and Data setup/hold (T_DST, T_DHT). Example values: T_WC min 66 ns, T_RC min 160 ns (Read ID).
B. 4-Line Serial Interface Timing:
Includes Serial clock cycle (T_SCYCR), SCL pulse widths (T_SHR, T_SLR), D/CX setup/hold (T_DCS, T_DCH), Data setup/hold (T_SDS, T_SDH), and Data access time (T_ACC). Example values: T_SCYCR min 150 ns (Read).
3.2.5 Backlight Unit
- Configuration: 4-chip White LED in parallel.
- Drive Condition: Forward Current (I_F) = 80mA (Typical); Forward Voltage (V_f) = 3.0V (Typical).
3.3 Optical & Electro-Optical Characteristics (Ta=25°C)
| Item | Symbol | Condition | Min. | Typ. | Max. | Unit | Remark |
|---|---|---|---|---|---|---|---|
| Response Time | Tr + Tf | θx=θy=0 | - | 30 | 40 | ms | Note 1 |
| Contrast Ratio | CR | θx=θy=0 | 1000 | 1200 | - | - | Note 2 |
| Transmittance | T% | θx=θy=0 | 4.25 | 5 | - | % | |
| Color Chromaticity (White) | W x, W y | θx=θy=0 | - | 0.293, 0.335 | - | - | CIE1931 |
| Viewing Angle (CR>10) | θT, θB, θL, θR | - | - | 85 | - | Deg. | Note 3 |
Viewing Angle Note: Defined as the angle where contrast ratio exceeds 10. Measured in 12, 6, 9, and 3 o'clock directions.
4. Application Guidelines & Critical Notes
- Intended Use: Wearables, smart home devices, portable industrial tools, hobbyist projects—where interface flexibility is valued to match different host MCU capabilities.
- Critical Design Considerations:
- Interface Mode Selection: This is the most critical step. Decide on SPI or Parallel mode based on your MCU's resources and required bandwidth. Permanently set the IM1/2 pin (Pin 8) to VCC (for SPI) or GND (for Parallel) via PCB wiring. Do not dynamically toggle it.
- Pin Multiplexing: Understand the completely different pin functions in SPI vs. Parallel mode. Your schematic and PCB layout must only connect the pins relevant to your chosen mode.
- SPI Mode: Uses fewer wires (CS, SCL/RS, SDA/WR, optionally RESET). Ideal for pin-constrained designs.
- Parallel Mode: Offers higher potential data throughput but uses many more pins (8 data + CS, RS, WR, RD). Ensure your MCU can source/sink the required current on the data bus.
- Timing Compliance: Regardless of mode, the host must meet the respective setup, hold, and pulse width requirements. The parallel mode typically has tighter write cycle timing.
- Power Supplies: Provide clean 2.8V (VCC) and 1.8V (IOVCC). IOVCC sets the logic threshold for all digital inputs.
- Backlight Driver: Design an 80mA constant-current driver for the four parallel LEDs.
- Handling & Compliance: Module is ROHS compliant. Follow FPC bend radius guidelines and ESD precautions.
5. Conclusion & Design-In Support
The LS19I03-SM-V1 specification presents a highly versatile 1.9-inch IPS display module with a unique selectable SPI/Parallel interface. This is its defining feature, allowing it to adapt to diverse project requirements. The comprehensive timing specifications for both modes are invaluable for ensuring reliable communication. The primary design task is to irreversibly choose and hardwire the interface mode via the IM1/2 pin. For SPI mode, it offers a compact, low-pin-count solution. For parallel mode, it provides higher bandwidth for faster updates. The excellent 85-degree viewing angles are a bonus. By carefully configuring the interface and adhering to the chosen mode's timing, this module provides a flexible and high-performance display solution for advanced embedded systems.
