Product Subtitle / Keywords:
2.8 Inch Display, QVGA 240x320 Resolution, Transmissive a-Si TN TFT, 16-bit 8080 Parallel Interface, COG+FPC+B/L, 262K Colors, ILI9341V Driver, 36-pin FPC, -20°C~70°C Operating Temperature
1. Executive Summary & Product Positioning
The LS028T38-M-V1, developed by LESSON (Wan'an) Zhixian Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 2.8-inch transmissive amorphous Silicon TFT-LCD module.
This product specification book (Revision 1.0, Module Type: COG+FPC+B/L) serves as the definitive technical document, defining its structural composition (COG+FPC+B/L), physical features, mechanical dimensions, absolute maximum ratings, detailed electrical characteristics, complete 16-bit 8080 parallel interface pinout and timing, and comprehensive electro-optical performance. It delivers a QVGA resolution of 240(RGB)×320 with 262K-color display capability, driven by the ILI9341V controller.
The document provides the core parameters necessary for system integration into embedded display applications. The unequivocal recommendation for engineers is to strictly adhere to the electrical specifications, interface timing, and mechanical tolerances described herein to ensure reliable performance and compatibility.
2. Detailed Product Overview & Architecture
- Core Technology: Transmissive-type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display).
- Display Mode: Active matrix TFT, Transmissive type.
- Display Characteristics: Capable of displaying up to 262 thousand colors.
- Module Construction: COG (Chip-On-Glass) + FPC (Flexible Printed Circuit) + B/L (Backlight Unit). Composed of a TFT-LCD panel, a driver circuit, and a backlight unit.
- Input Data: 16bit 8080 (parallel interface).
- Viewing Direction (Grayscale Inversion): TN (Twisted Nematic).
- Drive IC: ILI9341V.
- Viewing Direction: 12 o'clock.
- Approval Status: ☑ Approved Product Specification only (as per signature block).
3. Exhaustive Technical Specifications
3.1 Mechanical & Physical Specifications
| Item | Specification | Unit |
|---|---|---|
| Module size (H×V×D) | 50.0 × 69.1 × 2.3 | mm |
| Active area (H×V) | 43.2 × 57.6 | mm |
| Number of dots / Resolution | 240(RGB) × 320 | pixel |
| Panel Size (Diagonal) | 2.8 | inch |
Critical Mechanical Design Notes (from document):
- General Tolerance: ±0.20 mm.
- Angular Tolerance: ±1/4°.
- Backlight: 4 Chip-White LEDs in Parallel.
- Operating Temperature: -20°C ~ +70°C.
- Storage Temperature: -30°C ~ +80°C.
- ROHS Compliance: Yes.
- Bezel Opening Design: It is recommended that the housing's visible area be at least 0.3mm smaller per side than the module's active area (VAMds).
- Foam Gasket Cutout Design: The cutout in the chassis foam gasket should be at least 0.6mm larger per side than the module's viewing area (VAMds).
- TP/Conductor Isolation: The Touch Panel (TP) edges must not come into contact with any metal conductors.
- Glass Segment to Edge Tolerance: ±0.2 mm.
- FPC+PI Reinforcement Total Thickness: 0.30 mm.
- LCM Thickness (Side View): 2.3±0.2 mm.
3.2 Electrical & Interface Specifications
3.2.1 Absolute Maximum Ratings
| Item | Symbol | Min | Max | Unit | Remark |
|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 4.6 | V | Note1, Note2 |
| Supply voltage | IOVCC | -0.3 | 4.6 | V | Note1, Note2 |
| Operating temperature | TOPR | -20 | 70 | °C | Note1, Note2 |
| Storage temperature | TSTR | -30 | 80 | °C | Note1, Note2 |
Notes (interpreted):
- Note1/Note2: Stress beyond these ratings may cause permanent damage; functional operation is not implied under these conditions.
3.2.2 Electrical Characteristics (DC – Recommended Operating Conditions)
Conditions: VDDI=1.65 to 3.3V, VDD=2.4 to 3.3V, AGND=DGND=0V, Ta=25°C.
| Item | Item | Symbol | Min | Typ | Max | Unit | Remark |
|---|---|---|---|---|---|---|---|
| Supply voltage | Supply voltage | VCC | 2.5 | 2.8 | 3.3 | V | Note1 |
| Supply voltage | Supply voltage | IOVCC | 1.65 | 2.8 | 3.3 | V | Note1 |
| Input Voltage (Low level) | Input Voltage (Low level) | VIL | 0 | — | 0.3 * IOVCC | V | Note1 |
| Input Voltage (High level) | Input Voltage (High level) | VIH | 0.7 * IOVCC | — | IOVCC | V | Note1 |
Note: The typical IOVCC is 2.8V (same as VCC), not the more common 1.8V. This simplifies power supply design as both supplies can use the same voltage rail.
3.2.3 Pin Description (36-pin FPC)
| PIN NO. | Symbol | I/O | Description |
|---|---|---|---|
| 1 | GND | P | Ground |
| 2 | NC | — | No Connection |
| 3 | NC | — | No Connection |
| 4 | DB10 | I | Data bus |
| 5 | DB9 | I | Data bus |
| 6 | DB4 | I | Data bus |
| 7 | DB3 | I | Data bus |
| 8 | RD | I | Read signal in 8080 parallel interface |
| 9 | WR | I | Write signal in 8080 parallel interface |
| 10 | RS | I | Command/Data select pin (DCX) |
| 11 | VCC | P | Power supply |
| 12 | VCC | P | Power supply |
| 13 | GND | P | Ground |
| 14 | GND | P | Ground |
| 15 | GND | P | Ground |
| 16 | NC | — | No Connection |
| 17 | DB15 | I | Data bus |
| 18 | DB14 | I | Data bus |
| 19 | DB13 | I | Data bus |
| 20 | DB12 | I | Data bus |
| 21 | DB11 | I | Data bus |
| 22 | DB8 | I | Data bus |
| 23 | DB7 | I | Data bus |
| 24 | DB6 | I | Data bus |
| 25 | DB5 | I | Data bus |
| 26 | DB2 | I | Data bus |
| 27 | DB1 | I | Data bus |
| 28 | DB0 | I | Data bus |
| 29 | RESE | I | Reset signal. Active low. |
| 30 | CS | I | Chip select input pin |
| 31 | IOVCC | P | I/O power supply |
| 32 | VCC | P | Power supply |
| 33 | VCC | P | Power supply |
| 34 | GND | P | Ground |
| 35 | GND | P | Ground |
| 36 | GND | P | Ground |
Interface Summary:
- 16-bit 8080 Parallel Interface: Data bus DB[0:15] with control signals CS (Chip Select), RS (Register Select / DCX), WR (Write), and RD (Read).
- Power Pins: Multiple VCC, IOVCC, and GND pins are distributed across the connector for power integrity.
- Data Bus: DB0-DB15 provide a full 16-bit data bus for maximum transfer speed.
- Reset: Dedicated RESE pin for hardware reset.
3.2.4 Parallel 8080 Interface Timing Characteristics
Conditions: VDDI=1.65 to 3.3V, VDD=2.4 to 3.3V, AGND=DGND=0V, Ta=25°C.
| Signal | Symbol | Parameter | Min | Max | Unit | Description |
|---|---|---|---|---|---|---|
| DCX | T_AST | Address setup time | 0 | — | ns | — |
| DCX | T_AHT | Address hold time (Write/Read) | 0 | — | ns | — |
| CSX | T_CHW | CSX "H" pulse width | 0 | — | ns | — |
| CSX | T_CS | Chip Select setup time (Write) | 15 | — | ns | — |
| CSX | T_RCS | Chip Select setup time (Read ID) | 45 | — | ns | — |
| CSX | T_RCSFM | Chip Select setup time (Read FM) | 355 | — | ns | — |
| CSX | T_CSF | Chip Select wait time (Write/Read) | 10 | — | ns | — |
| CSX | T_CSH | Chip Select hold time | 10 | — | ns | — |
| WRX | T_WC | Write cycle | 66 | — | ns | — |
| WRX | T_WRH | Write Control pulse "H" duration | 15 | — | ns | — |
| WRX | T_WRL | Write Control pulse "L" duration | 15 | — | ns | — |
| RDX (ID) | T_RC | Read cycle (ID) | 160 | — | ns | When read ID data |
| RDX (ID) | T_RDH | Control pulse "H" duration (ID) | 90 | — | ns | When read ID data |
| RDX (ID) | T_RDL | Control pulse "L" duration (ID) | 45 | — | ns | When read ID data |
| RDX (FM) | T_RCFM | Read cycle (FM) | 450 | — | ns | When read from frame memory |
| RDX (FM) | T_RDHFM | Control pulse "H" duration (FM) | 90 | — | ns | When read from frame memory |
| RDX (FM) | T_RDLFM | Control pulse "L" duration (FM) | 355 | — | ns | When read from frame memory |
| D[17:0] | T_DST | Write data setup time | 10 | — | ns | For maximum CL=30pF For minimum CL=8pF |
| D[17:0] | T_DHT | Write data hold time | 10 | — | ns | For maximum CL=30pF For minimum CL=8pF |
| — | T_RAT | Read access time | — | 40 | ns | For maximum CL=30pF For minimum CL=8pF |
| — | T_RATFM | Read access time | — | 340 | ns | For maximum CL=30pF For minimum CL=8pF |
| — | T_ROD | Read output disable time | 20 | 80 | ns | For maximum CL=30pF For minimum CL=8pF |
Key Timing Observation:
- Write cycle: 66ns minimum (equivalent to 15.15 MHz write rate).
- Read cycle (ID): 160ns minimum.
- Read cycle (Frame Memory): 450ns minimum — significantly slower than writes.
- CS to Write setup: Only 15ns required.
- Data setup/hold: 10ns each.
3.2.5 Reset Timing
| Related Pins | Symbol | Parameter | MIN | MAX | Unit |
|---|---|---|---|---|---|
| RESX | t_RW | Reset pulse duration | 10 | — | uS |
| RESX | t_RT | Reset cancel | — | 5 (note 1,5) | mS |
| RESX | t_RT | Reset cancel | — | 120 (note 1,6,7) | mS |
Reset Timing Notes (from document):
- The reset cancel also includes required time for loading ID bytes, VCOM setting and other settings from EEPROM to registers. This loading is done every time there is a H/W reset cancel time (t_RT) within 5 ms after a rising edge of RESX.
- Spike due to an electrostatic discharge on RESX line does not cause irregular system reset according to the Reset Description table.
- During the Resetting period, the display will be blanked (The display enters the blanking sequence, which maximum time is 120 ms, when Reset Starts in the Sleep Out mode. The display remains the blank state in Sleep In mode.) and then return to Default condition for Hardware Reset.
- Spike Rejection: Less than 20ns width positive spike will be rejected.
- When Reset applied during Sleep In Mode.
- When Reset applied during Sleep Out Mode.
- It is necessary to wait 5ms after releasing RESX before sending commands. Also Sleep Out command cannot be sent for 120ms.
3.2.6 Backlight Unit
(Note: The backlight driving condition is indicated in the mechanical drawing notes as: "驱动条件：IF=80mA,Vf=3.1V(TYP)" — Drive Condition: IF=80mA, Vf=3.1V(TYP). The pinout for the backlight is not explicitly listed in the 36-pin pin table provided — the backlight may be connected via separate pads or pins not numbered in the 36-pin FPC table.)
3.3 Optical & Electro-Optical Characteristics (Ta=25°C)
| Item | Item | Symbol | Condition | Min. | Typ. | Max. | Unit | Remark |
|---|---|---|---|---|---|---|---|---|
| Response time | Response time | Tr + Tf | θx = θy = 0 | — | 16 | — | ms | Note 1 |
| Contrast Ratio | Contrast Ratio | CR | θx = θy = 0 | — | 500 | — | — | Note 2 |
| Transmittance | Transmittance | T% | θx = θy = 0 | — | 6.4 | — | % | |
| Color Chromaticity (CIE1931) | White | Wx | θx = θy = 0 | — | 0.301 | — | — | |
| Color Chromaticity (CIE1931) | White | Wy | θx = θy = 0 | — | 0.337 | — | — | |
| Viewing angle | θT (TOP) | CR > 10 | — | 50 | — | Deg. | Note 3 | |
| Viewing angle | θB (BOTTOM) | CR > 10 | — | 20 | — | Deg. | Note 3 | |
| Viewing angle | θL (LEFT) | CR > 10 | — | 45 | — | Deg. | Note 3 | |
| Viewing angle | θR (RIGHT) | CR > 10 | — | 45 | — | Deg. | Note 3 |
Notes (from document):
- Response Time: Ambient temperature = 25°C. The response time is 16ms (Typ.), which is fast and suitable for most GUI and video applications.
- Contrast Ratio (CR): To be measured with a viewing cone of 2° by Topcon luminance meter BM-5A. The typical CR is 500:1.
- Viewing Angle: Asymmetric viewing angles typical for TN panels: Top (50°), Bottom (20°), Left (45°), Right (45°). The best viewing direction is 6 o'clock (from the top), meaning the display is best viewed when looking slightly downward at it.
- Color Chromaticity: To be measured with Otsuta chromaticity meter LCF-2100M. CF only measure under C light simulation.
- Transmittance: The specified transmittance is 6.4% (Typ.). CTC shipping status is cell without polarizer. Transmittance of Specification is cell with polarizer. The tolerance of Transmittance is ±10%.
3.4 Version Record
(Note: The document includes a Records of Version section (Section 9) but the specific version details are not provided in the given context excerpt.)
4. Application Guidelines & Critical Notes
Intended Use
- Industrial HMIs and control panels
- Embedded systems requiring a standard parallel interface
- Portable instruments and measurement devices
- IoT devices with graphical displays
- Any application requiring a 2.8-inch color display with a high-speed parallel interface
Critical Design Considerations
-
16-bit Parallel Interface: This module uses a 16-bit 8080 parallel interface. Unlike SPI-based modules, this requires many GPIO pins (16 data + 4 control = 20+ pins minimum).
- This interface offers the fastest data transfer among standard small display interfaces.
- The host MCU must have an external memory interface (FSMC/FMC) or sufficient GPIOs to drive the parallel bus.
- The write cycle minimum is 66ns (15.15 MHz), which is compatible with most STM32 FMC/FSMC controllers.
-
Interface Signal Routing:
- Keep the 16 data lines (DB0-DB15) and control signals (CS, RS, WR, RD) as short as possible.
- Length matching is recommended for the 16 data lines to minimize skew at 15 MHz.
- Avoid routing parallel signals near noisy power traces or high-frequency switching signals.
-
Power Supply:
- Provide stable VCC (2.5-3.3V, 2.8V typical) for the main logic.
- Provide stable IOVCC (1.65-3.3V, 2.8V typical) — note that typical IOVCC is 2.8V, not the more common 1.8V. This allows both VCC and IOVCC to share the same 2.8V rail, simplifying power supply design.
- Multiple VCC and GND pins (Pins 11, 12, 32, 33 for VCC; Pins 1, 13, 14, 15, 34, 35, 36 for GND) are provided for power integrity. Connect all of them in your PCB design.
- The backlight requires a constant-current LED driver — the drive condition from the outline drawing notes is 80 mA at 3.1V.
-
Reset Circuit:
- The RESE pin (Pin 29) is active low. It must be driven low for at least 10 µs to trigger a reset.
- A pulse shorter than 5 µs will be rejected.
- Wait 5 ms after releasing RESX before sending any commands.
- If reset occurs during Sleep Out mode, the display may take up to 120 ms to return to normal operation.
-
Mechanical Integration:
- Module Outline: 50.0mm (H) × 69.1mm (V) × 2.3mm (D).
- Active Area: 43.2mm × 57.6mm.
- Bezel Opening: Design the housing window 0.3mm smaller per side than the viewing area. This means a bezel opening of approximately 42.6mm × 57.0mm.
- Foam Gasket Cutout: Design the cutout 0.6mm larger per side than the viewing area.
- Viewing Direction: 12 o'clock (best viewing from the top).
- The module uses a 36-pin FPC — use a corresponding 36-pin, 0.5mm pitch FPC connector.
-
Unused Pin Handling:
- Pins 2, 3, and 16 are marked NC (No Connection) — leave them floating.
- The module pinout does not include dedicated backlight pins in the 36-pin connector — the backlight is likely connected via separate pads on the FPC.
-
Temperature Limits:
- Operating Temperature: -20°C to +70°C.
- Storage Temperature: -30°C to +80°C.
-
Viewing Angle Consideration:
- This is a TN panel with asymmetric viewing angles: Top (50°), Bottom (20°), Left (45°), Right (45°).
- The best image quality is obtained when viewing from the 12 o'clock direction (from above). The bottom viewing angle is limited (20°), which should be considered in the product's mechanical orientation.
Handling & Compliance
- The module is ROHS compliant.
- Observe standard ESD precautions during handling and assembly.
- The module contains fragile glass and a 36-pin FPC – handle with care.
- Avoid bending the FPC sharply, especially near the connector interface.
- The transmittance tolerance is ±10%.
5. Conclusion & Design-In Support
The LS028T38-M-V1 specification details a standard 2.8-inch QVGA TN display module with a 16-bit 8080 parallel interface and the ILI9341V driver IC.
Key Strengths:
-
Standard 2.8-inch QVGA Resolution (240x320): A widely supported resolution compatible with numerous driver IC libraries and UI frameworks.
-
High-Speed 16-bit Parallel Interface: The 66ns write cycle with a full 16-bit data bus offers the fastest data transfer among small display interfaces, making it ideal for applications requiring smooth animations and fast screen updates.
-
Mature & Well-Supported Driver IC (ILI9341V): The ILI9341V is one of the most popular and well-documented small display controllers, with extensive library support across all major microcontroller platforms (Arduino, STM32, ESP32, etc.).
-
Fast Response Time: 16ms (Typ.) response time ensures minimal motion blur and is suitable for video playback.
-
Clear Mechanical Guidelines: Explicit recommendations for bezel opening and foam cutout dimensions simplify enclosure design.
-
Comprehensive Power Distribution: Multiple VCC and GND pins are distributed across the 36-pin connector for optimal power integrity.
-
Detailed Reset Timing: Comprehensive reset timing notes, including spike rejection specifications, ensure reliable system initialization.
-
Robust Temperature Range: Designed for -20°C to +70°C operation and -30°C to +80°C storage.
Main Design Focus:
-
One of the most critical design tasks is the parallel interface PCB layout — routing the 16 data lines and 4 control signals with proper length matching and signal integrity at 15 MHz.
-
GPIO Allocation: The host MCU must have at least 20 GPIOs (16 data + 4 control) dedicated to the display interface. Using an MCU with an FSMC/FMC interface (such as an STM32) greatly simplifies this.
-
Power Supply: Provide stable VCC (2.8V) and IOVCC (2.8V) power (can share a single 2.8V rail). Provide a constant-current backlight driver set to 80 mA at 3.1V.
-
Driver Development: Software engineers must initialize the ILI9341V driver IC via the 16-bit parallel interface. Extensive open-source libraries are available for this driver.
-
Mechanical Integration: Follow the bezel opening and foam cutout guidelines. Account for the asymmetric TN viewing angles in product orientation.
Comparison with Similar Models:
| Feature | LS028T38-M-V1 | LS028T12-M-V1 |
|---|---|---|
| Interface | 16-bit 8080 Parallel | 8bit 8080 / SPI |
| Driver IC | ILI9341V | ST7789P3 |
| Response Time | 16ms (Typ.) | 16ms (Typ.) |
| Contrast Ratio | 500:1 (Typ.) | 500:1 (Typ.) |
| Viewing Angles | 50°/20°/45°/45° | 50°/20°/45°/45° |
| Transmittance | 6.4% (Typ.) | 6.4% (Typ.) |
| White Chromaticity (Wx, Wy) | (0.301, 0.337) | (0.301, 0.337) |
| Module Size | 50.0 × 69.1 × 2.3mm | — |
| FPC Pins | 36-pin | — |
| Backlight Drive | 80mA, 3.1V (Typ.) | 80mA, 3.1V(TYP) |
Key Difference: The LS028T38-M-V1 uses the ILI9341V driver IC with a 16-bit 8080 parallel interface, while the LS028T12-M-V1 uses the ST7789P3 driver with 8bit 8080 / SPI interfaces. The 16-bit parallel interface of the LS028T38-M-V1 offers double the data transfer rate compared to the 8-bit interface of the LS028T12-M-V1.
This module is an excellent choice for applications requiring a standard 2.8-inch color display with the highest possible data transfer rate through a full 16-bit parallel interface and the industry-standard ILI9341V driver.
