Product Subtitle / Keywords:
2.8 Inch Display, QVGA 240x320 Resolution, Transmissive a-Si TFT, 8080 Parallel (8/9/16/18-bit) & 3-Wire/4-Wire Serial Interface, COG+FPC+B/L, 262K Colors, 45-pin FPC, -20°C~70°C Operating Temperature, 16ms Response Time
1. Executive Summary & Product Positioning
The LS028T29-M-V1, developed by LESSON (Wan'an) Zhixian Technology Co., Ltd. (立信(万安)智显科技有限公司), is a 2.8-inch transmissive amorphous Silicon TFT-LCD module.
This product specification book (Revision 1.0, Module Type: COG+FPC+B/L) serves as the definitive technical document, defining its structural composition (COG+FPC+B/L), mechanical dimensions, absolute maximum ratings, detailed electrical characteristics, multi-interface support (parallel 8080 in various bus widths and 3-wire/4-wire serial) pinout and timing, and comprehensive electro-optical performance. It delivers a QVGA resolution of 240(RGB)×320 with 262K-color display capability.
The document provides the core parameters necessary for system integration into embedded display applications. The unequivocal recommendation for engineers is to strictly adhere to the electrical specifications, interface timing, and mechanical tolerances described herein to ensure reliable performance and compatibility.
2. Detailed Product Overview & Architecture
- Core Technology: Transmissive-type a-Si TFT-LCD (amorphous silicon thin film transistor liquid crystal display).
- Display Characteristics: Capable of displaying up to 262 thousand colors.
- Module Construction: COG (Chip-On-Glass) + FPC (Flexible Printed Circuit) + B/L (Backlight Unit). Composed of a TFT-LCD panel, a driver circuit, and a backlight unit.
- Input Data: Configurable via IM[3:0] pins to support multiple interface modes:
- 80 MCU 8-bit / 16-bit / 9-bit / 18-bit bus interface (I & II)
- 3-wire 9-bit data serial interface
- 4-wire 8-bit data serial interface
- Viewing Direction (Grayscale Inversion): TN (Twisted Nematic), 12 o'clock orientation.
- Backlight: 4 white LEDs in parallel (cathode pins LEDK1~4).
- Approval Status: ☑ Approved Product Specification only (as per signature block).
3. Exhaustive Technical Specifications
3.1 Mechanical & Physical Specifications
| Item | Specification | Unit |
|---|---|---|
| Module size (H×V×D) | 50.4 × 69.6 × 2.38 | mm |
| Active area (H×V) | 43.2 × 57.6 | mm |
| Number of dots / Resolution | 240(RGB) × 320 | pixel |
| Panel Size (Diagonal) | 2.8 | inch |
3.2 Electrical & Interface Specifications
3.2.1 Absolute Maximum Ratings
| Item | Symbol | Min | Max | Unit | Remark |
|---|---|---|---|---|---|
| Supply voltage | VCC | -0.3 | 4.6 | V | Note1 |
| Supply voltage | IOVCC | -0.3 | 4.0 | V | Note1 |
| Operating temperature | TOPR | -20 | 70 | °C | Note1 |
| Storage temperature | TSTR | -30 | 80 | °C | Note1 |
Notes: Stress beyond these ratings may cause permanent damage; functional operation is not implied under these conditions.
3.2.2 Electrical Characteristics (DC – Recommended Operating Conditions)
| Item | Symbol | Min | Typ | Max | Unit | Remark |
|---|---|---|---|---|---|---|
| Supply voltage | VCC | 2.5 | 2.8 | 3.3 | V | Note1 |
| Input voltage (L level) | VIL | 0 | — | 0.3×IOVCC | V | Note1 |
| Input voltage (H level) | VIH | 0.7×IOVCC | — | IOVCC | V | Note1 |
(IOVCC range: 1.65V to 3.3V as per timing conditions.)
3.2.3 Pin Description (45-pin FPC)
| PIN NO. | Symbol | I/O | Description |
|---|---|---|---|
| 1 | IM1 | I | Interface mode selection pin 1 |
| 2 | IM2 | I | Interface mode selection pin 2 |
| 3 | IM3 | I | Interface mode selection pin 3 |
| 4 | IM0 | I | Interface mode selection pin 0 |
| 5 | CS | I | Chip select input pin |
| 6 | RS | I | Data/Command select (parallel) / Serial clock (serial modes) |
| 7 | WR | I | Write signal (parallel) / Command/Parameter select (4-line serial) |
| 8 | RD | I | Read signal (parallel) |
| 9 | RESET | I | Reset signal, active low |
| 10 | SDI | I | Serial data input (serial modes) |
| 11 | SDO | O | Serial data output (serial modes) |
| 12–33 | (various DB pins, NC, etc.) | — | Refer to full pin table |
| 34 | LEDA | P | Power for LED backlight anode |
| 35–38 | LEDK | P | Power for LED backlight cathode (4 pins) |
| 39–42 | X+, Y+, X–, Y– | I | NC (reserved for touch panel, not connected) |
| 43–44 | GND | P | Ground |
| 45 | VCC | P | Power supply |
3.2.4 Interface Mode Selection (IM[3:0])
| IM3 | IM2 | IM1 | IM0 | Interface Mode | Data Pins Used |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 80 MCU 8-bit bus (I) | D[7:0] (GRAM) |
| 0 | 0 | 0 | 1 | 80 MCU 16-bit bus (I) | D[15:0] |
| 0 | 0 | 1 | 0 | 80 MCU 9-bit bus (I) | D[8:0] |
| 0 | 0 | 1 | 1 | 80 MCU 18-bit bus (I) | D[17:0] |
| 0 | 1 | 0 | 1 | 3-wire 9-bit serial | SDA (in/out) |
| 0 | 1 | 1 | 0 | 4-wire 8-bit serial | SDA (in/out) |
| 1 | 0 | 0 | 0 | 80 MCU 16-bit bus (II) | D[17:10], D[8:1] |
| 1 | 0 | 0 | 1 | 80 MCU 8-bit bus (II) | D[17:10] |
| 1 | 0 | 1 | 0 | 80 MCU 18-bit bus (II) | D[17:9] |
| 1 | 0 | 1 | 1 | 80 MCU 9-bit bus (II) | D[17:9] |
| 1 | 1 | 0 | 1 | 3-wire 9-bit serial (II) | SDI(in), SDO(out) |
| 1 | 1 | 1 | 0 | 4-wire 8-bit serial (II) | SDI(in), SDO(out) |
3.2.5 Parallel Interface Timing Characteristics (8080 System)
Conditions: VDDI=1.65 to 3.3V, VCI=2.5 to 3.3V, VSS=0V, Ta=25°C.
| Signal | Symbol | Parameter | MIN | MAX | Unit |
|---|---|---|---|---|---|
| DCX | T_AST | Address setup time | 0 | — | ns |
| DCX | T_AHT | Address hold time | 0 | — | ns |
| CSX | T_CHW | CSX "H" pulse width | 0 | — | ns |
| CSX | T_CS | Chip Select setup time (Write) | 15 | — | ns |
| CSX | T_RCS | Chip Select setup time (Read ID) | 45 | — | ns |
| CSX | T_RCSFM | Chip Select setup time (Read FM) | 355 | — | ns |
| CSX | T_CSF | Chip Select wait time | 10 | — | ns |
| WRX | T_WC | Write cycle | 66 | — | ns |
| WRX | T_WRH | Write Control pulse H duration | 15 | — | ns |
| WRX | T_WRL | Write Control pulse L duration | 15 | — | ns |
| RDX (ID) | T_RC | Read cycle (ID) | 160 | — | ns |
| RDX (FM) | T_RCFM | Read cycle (FM) | 450 | — | ns |
| D[17:0] | T_DST | Write data setup time | 10 | — | ns |
| D[17:0] | T_DHT | Write data hold time | 10 | — | ns |
| — | T_RAT | Read access time (ID) | — | 40 | ns |
| — | T_RATFM | Read access time (FM) | — | 340 | ns |
3.2.6 Serial Interface Timing Characteristics (3-wire SPI System)
| Signal | Symbol | Parameter | MIN | MAX | Unit |
|---|---|---|---|---|---|
| SCL | T_SCYCW | Serial clock cycle (Write) | 100 | — | ns |
| SCL | T_SHW | SCL "H" pulse width (Write) | 40 | — | ns |
| SCL | T_SLW | SCL "L" pulse width (Write) | 40 | — | ns |
| SCL | T_SCYCR | Serial clock cycle (Read) | 150 | — | ns |
| SDA/SDI (Input) | T_SDS | Data setup time (Write) | 30 | — | ns |
| SDA/SDI (Input) | T_SDH | Data hold time (Write) | 30 | — | ns |
| SDA/SDO (Output) | T_ACC | Access time (Read) | 10 | — | ns |
| SDA/SDO (Output) | T_OH | Output disable time | 10 | 50 | ns |
Note: 4-wire SPI timing is similar with additional D/CX control; refer to the full spec for details.
3.2.7 Reset Timing
| Signal | Symbol | Parameter | MIN | MAX | Unit |
|---|---|---|---|---|---|
| RESX | t_RW | Reset pulse duration | 10 | — | uS |
| RESX | t_RT | Reset cancel (Sleep In Mode) | — | 5 | mS |
| RESX | t_RT | Reset cancel (Sleep Out Mode) | — | 120 | mS |
Critical Reset Notes:
- A pulse shorter than 5µs is rejected; pulses between 5µs and 10µs may start a reset.
- After releasing RESX, wait 5ms before sending commands; Sleep Out command cannot be sent for 120ms if reset occurred in Sleep Out mode.
3.2.8 Backlight Unit
| Item | Specification | Unit |
|---|---|---|
| Configuration | 4 LED cathodes (parallel) | — |
| Drive Condition | IF = 80 mA, VF = 3.1V (Typ) | — |
3.3 Optical & Electro-Optical Characteristics (Ta=25°C)
| Item | Symbol | Condition | Min. | Typ. | Max. | Unit | Remark |
|---|---|---|---|---|---|---|---|
| Response time | Tr + Tf | θx = θy = 0° | — | 16 | — | ms | Note 1 |
| Contrast Ratio | CR | θx = θy = 0° | — | 500 | — | — | Note 2 |
| Transmittance | T% | θx = θy = 0° | — | 6.4 | — | % | — |
| Color Chromaticity (CIE1931) | White Wx | θx = θy = 0° | — | 0.301 | — | — | — |
| Color Chromaticity (CIE1931) | White Wy | θx = θy = 0° | — | 0.337 | — | — | — |
| Viewing angle | θT (TOP) | CR > 10 | — | 50 | — | Deg. | Note 3 |
| Viewing angle | θB (BOTTOM) | CR > 10 | — | 20 | — | Deg. | Note 3 |
| Viewing angle | θL (LEFT) | CR > 10 | — | 45 | — | Deg. | Note 3 |
| Viewing angle | θR (RIGHT) | CR > 10 | — | 45 | — | Deg. | Note 3 |
Notes:
- Response time measured at 25°C ambient.
- Contrast measured with Topcon BM-5A, 2° viewing cone.
- Viewing angles are asymmetric (TN panel); best view from 12 o'clock.
3.4 Version Record
| Version | Revise Date | Page | Content |
|---|---|---|---|
| 00 | 2026-01-17 | ALL | New released |
4. Application Guidelines & Critical Notes
Intended Use
- Industrial HMIs and control panels
- Portable instruments and measurement devices
- Embedded systems requiring flexible interface selection
- IoT devices with moderate display requirements
Critical Design Considerations
-
Interface Selection (IM[3:0] Pins) – CRITICAL:
Configure the IM[3:0] pins before power-up to select the desired interface mode. These pins determine the function of data and control pins. Unused data pins must be properly terminated (tied to IOVCC or GND as per the pin description). -
Multi-Interface Flexibility:
This module supports both parallel (8/9/16/18-bit) and serial (3-wire/4-wire) interfaces. The parallel interface offers the highest data throughput (write cycle 66ns), while serial interfaces save GPIO pins. Ensure your host MCU supports the selected mode. -
Power Supply:
Provide stable VCC (2.8V typical) for core logic and IOVCC (1.8V or 3.3V) for I/O interface. Note the VIL/VIH thresholds are referenced to IOVCC. -
Backlight Drive:
The backlight uses 4 LED cathode pins (LEDK1~4) in parallel. Use a constant-current LED driver set to 80 mA with compliance voltage up to 3.1V (typical). Connect all four cathode pins to the driver's current sink. -
Unused Touch Pins (X+, Y+, X–, Y–):
Pins 39–42 are labeled NC but correspond to a resistive touch panel interface. They are not connected in this module and should be left floating. -
Reset Circuit:
The RESET pin must be held low for at least 10 µs. Provide an RC circuit or GPIO-driven reset. Observe the 120ms wait time if resetting during Sleep Out mode. -
Mechanical Integration:
- Module outline: 50.4×69.6×2.38mm; active area: 43.2×57.6mm.
- Use the recommended bezel opening (0.3mm smaller per side than active area) and foam cutout (0.6mm larger per side).
- The module includes 45-pin FPC with 0.5mm pitch (verify from drawing).
-
Temperature Limits:
Operating: -20°C to +70°C; Storage: -30°C to +80°C. -
Viewing Angle:
This is a TN panel with asymmetric viewing (50°/20°/45°/45°). Best image quality is obtained when viewing from the 12 o'clock direction.
Handling & Compliance
- ROHS compliant.
- Observe standard ESD precautions during handling and assembly.
- The module contains fragile glass and a 45-pin FPC – handle with care, avoid sharp bending of the FPC.
5. Conclusion & Design-In Support
The LS028T29-M-V1 specification details a versatile 2.8-inch QVGA TN display module offering exceptional interface flexibility (parallel 8/9/16/18-bit and 3-wire/4-wire serial).
Key Strengths:
- Multi-Interface Support: The IM[3:0] pins allow selection among 14 different interface modes, making this module compatible with virtually any microcontroller architecture.
- Fast Parallel Write Speed: 66ns write cycle (15.15 MHz) for high-throughput applications.
- Standard 2.8-inch QVGA Resolution: Widely supported across software libraries.
- Robust Temperature Range: -20°C to +70°C operation.
- Comprehensive Timing Documentation: Detailed parallel and serial timing parameters provided.
- 4-LED Parallel Backlight: Multiple cathode pins for even current distribution.
Main Design Focus:
- Correct interface configuration (IM[3:0]) and proper termination of unused pins.
- Power supply design: Stable VCC (2.8V) and IOVCC (1.8V/3.3V) with a constant-current backlight driver at 80mA.
- Mechanical design: Follow bezel and foam cutout recommendations.
This module is an excellent, universally adaptable solution for engineers who need a single display design that can work with different processors and interface protocols.
